Skip to content

Commit a3cba69

Browse files
joseph-lo-nvtwthierryreding
authored andcommitted
clk: tegra: Export functions for EMC clock scaling
Export functions to allow accessing the CAR register required by EMC clock scaling. These functions will be used to access the CAR register as part of the scaling sequence. Signed-off-by: Joseph Lo <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
1 parent cd4d6f3 commit a3cba69

File tree

2 files changed

+29
-0
lines changed

2 files changed

+29
-0
lines changed

drivers/clk/tegra/clk-tegra210.c

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@
3737
#define CLK_SOURCE_LA 0x1f8
3838
#define CLK_SOURCE_SDMMC2 0x154
3939
#define CLK_SOURCE_SDMMC4 0x164
40+
#define CLK_SOURCE_EMC_DLL 0x664
4041

4142
#define PLLC_BASE 0x80
4243
#define PLLC_OUT 0x84
@@ -227,6 +228,10 @@
227228
#define RST_DFLL_DVCO 0x2f4
228229
#define DVFS_DFLL_RESET_SHIFT 0
229230

231+
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_X_SET 0x284
232+
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_X_CLR 0x288
233+
#define CLK_OUT_ENB_X_CLK_ENB_EMC_DLL BIT(14)
234+
230235
#define CLK_RST_CONTROLLER_RST_DEV_Y_SET 0x2a8
231236
#define CLK_RST_CONTROLLER_RST_DEV_Y_CLR 0x2ac
232237
#define CPU_SOFTRST_CTRL 0x380
@@ -555,6 +560,27 @@ void tegra210_set_sata_pll_seq_sw(bool state)
555560
}
556561
EXPORT_SYMBOL_GPL(tegra210_set_sata_pll_seq_sw);
557562

563+
void tegra210_clk_emc_dll_enable(bool flag)
564+
{
565+
u32 offset = flag ? CLK_RST_CONTROLLER_CLK_OUT_ENB_X_SET :
566+
CLK_RST_CONTROLLER_CLK_OUT_ENB_X_CLR;
567+
568+
writel_relaxed(CLK_OUT_ENB_X_CLK_ENB_EMC_DLL, clk_base + offset);
569+
}
570+
EXPORT_SYMBOL_GPL(tegra210_clk_emc_dll_enable);
571+
572+
void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value)
573+
{
574+
writel_relaxed(emc_dll_src_value, clk_base + CLK_SOURCE_EMC_DLL);
575+
}
576+
EXPORT_SYMBOL_GPL(tegra210_clk_emc_dll_update_setting);
577+
578+
void tegra210_clk_emc_update_setting(u32 emc_src_value)
579+
{
580+
writel_relaxed(emc_src_value, clk_base + CLK_SOURCE_EMC);
581+
}
582+
EXPORT_SYMBOL_GPL(tegra210_clk_emc_update_setting);
583+
558584
static void tegra210_generic_mbist_war(struct tegra210_domain_mbist_war *mbist)
559585
{
560586
u32 val;

include/linux/clk/tegra.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -131,6 +131,9 @@ extern void tegra210_set_sata_pll_seq_sw(bool state);
131131
extern void tegra210_put_utmipll_in_iddq(void);
132132
extern void tegra210_put_utmipll_out_iddq(void);
133133
extern int tegra210_clk_handle_mbist_war(unsigned int id);
134+
extern void tegra210_clk_emc_dll_enable(bool flag);
135+
extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value);
136+
extern void tegra210_clk_emc_update_setting(u32 emc_src_value);
134137

135138
struct clk;
136139

0 commit comments

Comments
 (0)