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jpemartinsjoergroedel
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iommu/amd: Switch amd_iommu_update_ga() to use modify_irte_ga()
The modify_irte_ga() uses cmpxchg_double() to update the IRTE in one shot, which is necessary when adding IRTE cache disabling support since the driver no longer need to flush the IRT for hardware to take effect. Please note that there is a functional change where the IsRun and Destination bits of IRTE are now cached in the struct amd_ir_data.entry. Reviewed-by: Jerry Snitselaar <[email protected]> Signed-off-by: Joao Martins <[email protected]> Signed-off-by: Suravee Suthikulpanit <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/amd/iommu.c

Lines changed: 10 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -3702,44 +3702,26 @@ int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
37023702

37033703
int amd_iommu_update_ga(int cpu, bool is_run, void *data)
37043704
{
3705-
unsigned long flags;
3706-
struct amd_iommu *iommu;
3707-
struct irq_remap_table *table;
37083705
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
3709-
int devid = ir_data->irq_2_irte.devid;
37103706
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
3711-
struct irte_ga *ref = (struct irte_ga *) ir_data->ref;
37123707

37133708
if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) ||
3714-
!ref || !entry || !entry->lo.fields_vapic.guest_mode)
3709+
!entry || !entry->lo.fields_vapic.guest_mode)
37153710
return 0;
37163711

3717-
iommu = ir_data->iommu;
3718-
if (!iommu)
3719-
return -ENODEV;
3720-
3721-
table = get_irq_table(iommu, devid);
3722-
if (!table)
3712+
if (!ir_data->iommu)
37233713
return -ENODEV;
37243714

3725-
raw_spin_lock_irqsave(&table->lock, flags);
3726-
3727-
if (ref->lo.fields_vapic.guest_mode) {
3728-
if (cpu >= 0) {
3729-
ref->lo.fields_vapic.destination =
3730-
APICID_TO_IRTE_DEST_LO(cpu);
3731-
ref->hi.fields.destination =
3732-
APICID_TO_IRTE_DEST_HI(cpu);
3733-
}
3734-
ref->lo.fields_vapic.is_run = is_run;
3735-
barrier();
3715+
if (cpu >= 0) {
3716+
entry->lo.fields_vapic.destination =
3717+
APICID_TO_IRTE_DEST_LO(cpu);
3718+
entry->hi.fields.destination =
3719+
APICID_TO_IRTE_DEST_HI(cpu);
37363720
}
3721+
entry->lo.fields_vapic.is_run = is_run;
37373722

3738-
raw_spin_unlock_irqrestore(&table->lock, flags);
3739-
3740-
iommu_flush_irt(iommu, devid);
3741-
iommu_completion_wait(iommu);
3742-
return 0;
3723+
return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
3724+
ir_data->irq_2_irte.index, entry, ir_data);
37433725
}
37443726
EXPORT_SYMBOL(amd_iommu_update_ga);
37453727
#endif

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