clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val()

In zonda_pll_adjust_l_val() replace the divide operator with comparison
operator to fix below build error and smatch warning.

drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'

smatch warnings:
drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'

Fixes: f497313 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
Reported-by: Jon Hunter <[email protected]>
Reported-by: kernel test robot <[email protected]>
Reported-by: Dan Carpenter <[email protected]>
Closes: https://lore.kernel.org/r/[email protected]/
Signed-off-by: Satya Priya Kakitapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Vladimir Zapolskiy <[email protected]>
Tested-by: Jon Hunter <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

Author: Satya Priya Kakitapalli

drivers/clk/qcom/clk-alpha-pll.c

@@ -2124,10 +2124,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32
 
 	quotient = rate;
 	remainder = do_div(quotient, prate);
-	*l = quotient;
 
-	if ((remainder * 2) / prate)
-		*l = *l + 1;
+	*l = rate + (u32)(remainder * 2 >= prate);
 }
 
 static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,