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ideakjnikula
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drm/i915/tc: Fix TypeC port init/resume time sanitization
Atm during driver loading and system resume TypeC ports are accessed before their HW/SW state is synced. Move the TypeC port sanitization to the encoder's sync_state hook to fix this. v2: Handle the encoder disabled case in gen11_dsi_sync_state() as well (Jose, Jani) Fixes: f9e76a6 ("drm/i915: Add an encoder hook to sanitize its state during init/resume") Cc: José Roberto de Souza <[email protected]> Cc: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 7194dc9) Signed-off-by: Jani Nikula <[email protected]>
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3 files changed

+20
-18
lines changed

3 files changed

+20
-18
lines changed

drivers/gpu/drm/i915/display/icl_dsi.c

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1577,8 +1577,14 @@ static void gen11_dsi_sync_state(struct intel_encoder *encoder,
15771577
const struct intel_crtc_state *crtc_state)
15781578
{
15791579
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1580-
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
1581-
enum pipe pipe = intel_crtc->pipe;
1580+
struct intel_crtc *intel_crtc;
1581+
enum pipe pipe;
1582+
1583+
if (!crtc_state)
1584+
return;
1585+
1586+
intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
1587+
pipe = intel_crtc->pipe;
15821588

15831589
/* wa verify 1409054076:icl,jsl,ehl */
15841590
if (DISPLAY_VER(dev_priv) == 11 && pipe == PIPE_B &&

drivers/gpu/drm/i915/display/intel_ddi.c

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3807,7 +3807,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
38073807
static void intel_ddi_sync_state(struct intel_encoder *encoder,
38083808
const struct intel_crtc_state *crtc_state)
38093809
{
3810-
if (intel_crtc_has_dp_encoder(crtc_state))
3810+
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3811+
enum phy phy = intel_port_to_phy(i915, encoder->port);
3812+
3813+
if (intel_phy_is_tc(i915, phy))
3814+
intel_tc_port_sanitize(enc_to_dig_port(encoder));
3815+
3816+
if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))
38113817
intel_dp_sync_state(encoder, crtc_state);
38123818
}
38133819

drivers/gpu/drm/i915/display/intel_display.c

Lines changed: 5 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -13082,18 +13082,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
1308213082
readout_plane_state(dev_priv);
1308313083

1308413084
for_each_intel_encoder(dev, encoder) {
13085+
struct intel_crtc_state *crtc_state = NULL;
13086+
1308513087
pipe = 0;
1308613088

1308713089
if (encoder->get_hw_state(encoder, &pipe)) {
13088-
struct intel_crtc_state *crtc_state;
13089-
1309013090
crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
1309113091
crtc_state = to_intel_crtc_state(crtc->base.state);
1309213092

1309313093
encoder->base.crtc = &crtc->base;
1309413094
intel_encoder_get_config(encoder, crtc_state);
13095-
if (encoder->sync_state)
13096-
encoder->sync_state(encoder, crtc_state);
1309713095

1309813096
/* read out to slave crtc as well for bigjoiner */
1309913097
if (crtc_state->bigjoiner) {
@@ -13108,6 +13106,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
1310813106
encoder->base.crtc = NULL;
1310913107
}
1311013108

13109+
if (encoder->sync_state)
13110+
encoder->sync_state(encoder, crtc_state);
13111+
1311113112
drm_dbg_kms(&dev_priv->drm,
1311213113
"[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",
1311313114
encoder->base.base.id, encoder->base.name,
@@ -13390,17 +13391,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
1339013391
intel_modeset_readout_hw_state(dev);
1339113392

1339213393
/* HW state is read out, now we need to sanitize this mess. */
13393-
13394-
/* Sanitize the TypeC port mode upfront, encoders depend on this */
13395-
for_each_intel_encoder(dev, encoder) {
13396-
enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
13397-
13398-
/* We need to sanitize only the MST primary port. */
13399-
if (encoder->type != INTEL_OUTPUT_DP_MST &&
13400-
intel_phy_is_tc(dev_priv, phy))
13401-
intel_tc_port_sanitize(enc_to_dig_port(encoder));
13402-
}
13403-
1340413394
get_encoder_power_domains(dev_priv);
1340513395

1340613396
if (HAS_PCH_IBX(dev_priv))

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