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Merge tag 'drm-next-2022-12-13' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie: "The biggest highlight is that the accel subsystem framework is merged. Hopefully for 6.3 we will be able to line up a driver to use it. In drivers land, i915 enables DG2 support by default now, and nouveau has a big stability refactoring and initial ampere support, AMD includes new hw IP support and should build on ARM again. There is also an ofdrm driver to take over offb on platforms it's used. Stuff outside my tree, the dma-buf patches hit a few places, the vc4 firmware changes also do, and i915 has some interactions with MEI for discrete GPUs. I think all of those should have been acked/reviewed by relevant parties. New driver: - ofdrm - replacement for offb fbdev: - add support for nomodeset fourcc: - add Vivante tiled modifier core: - atomic-helpers: CRTC primary plane test fixes, fb access hooks - connector: TV API consistency, cmdline parser improvements - send connector hotplug on cleanup - sort makefile objects tests: - sort kunit tests - improve DP-MST tests - add kunit helpers to create a device sched: - module param for scheduling policy - refcounting fix buddy: - add back random seed log ttm: - convert ttm_resource to size_t - optimize pool allocations edid: - HFVSDB parsing support fixes - logging/debug improvements - DSC quirks dma-buf: - Add unlocked vmap and attachment mapping - move drivers to common locking convention - locking improvements firmware: - new API for rPI firmware and vc4 xilinx: - zynqmp: displayport bridge support - dpsub fix bridge: - adv7533: Remove dynamic lane switching - it6505: Runtime PM support, sync improvements - ps8640: Handle AUX defer messages - tc358775: Drop soft-reset over I2C panel: - panel-edp: Add INX N116BGE-EA2 C2 and C4 support. - Jadard JD9365DA-H3 - NewVision NV3051D amdgpu: - DCN support on ARM - DCN 2.1 secure display - Sienna Cichlid mode2 reset fixes - new GC 11.x firmware versions - drop AMD specific DSC workarounds in favour of drm code - clang warning fixes - scheduler rework - SR-IOV fixes - GPUVM locking fixes - fix memory leak in CS IOCTL error path - flexible array updates - enable new GC/PSP/SMU/NBIO IP - GFX preemption support for gfx9 amdkfd: - cache size fixes - userptr fixes - enable cooperative launch on gfx 10.3 - enable GC 11.0.4 KFD support radeon: - replace kmap with kmap_local_page - ACPI ref count fix - HDA audio notifier support i915: - DG2 enabled by default - MTL enablement work - hotplug refactoring - VBT improvements - Display and watermark refactoring - ADL-P workaround - temp disable runtime_pm for discrete- - fix for A380 as a secondary GPU - Wa_18017747507 for DG2 - CS timestamp support fixes for gen5 and earlier - never purge busy TTM objects - use i915_sg_dma_sizes for all backends - demote GuC kernel contexts to normal priority - gvt: refactor for new MDEV interface - enable DC power states on eDP ports - fix gen 2/3 workarounds nouveau: - fix page fault handling - Ampere acceleration support - driver stability improvements - nva3 backlight support msm: - MSM_INFO_GET_FLAGS support - DPU: XR30 and P010 image formats - Qualcomm SM6115 support - DSI PHY support for QCM2290 - HDMI: refactored dev init path - remove exclusive-fence hack - fix speed-bin detection - enable clamp to idle on 7c3 - improved hangcheck detection vmwgfx: - fb and cursor refactoring - convert to generic hashtable - cursor improvements etnaviv: - hw workarounds - softpin MMU fixes ast: - atomic gamma LUT support - convert to SHMEM lcdif: - support YUV planes - Increase DMA burst size - FIFO threshold tuning meson: - fix return type of cvbs mode_valid mgag200: - fix PLL setup on some revisions sun4i: - A100 and D1 support udl: - modesetting improvements - hot unplug support vc4: - support PAL-M - fix regression preventing 4K @ 60Hz - fix NULL ptr deref v3d: - switch to drm managed resources renesas: - RZ/G2L DSI support - DU Kconfig cleanup mediatek: - fixup dpi and hdmi - MT8188 dpi support - MT8195 AFBC support tegra: - NVDEC hardware on Tegra234 SoC hdlcd: - switch to drm managed resources ingenic: - fix registration error path hisilicon: - convert to drm_mode_init maildp: - use managed resources mtk: - use drm_mode_init rockchip: - use drm_mode_copy" * tag 'drm-next-2022-12-13' of git://anongit.freedesktop.org/drm/drm: (1397 commits) drm/amdgpu: fix mmhub register base coding error drm/amdgpu: add tmz support for GC IP v11.0.4 drm/amdgpu: enable GFX Clock Gating control for GC IP v11.0.4 drm/amdgpu: enable GFX Power Gating for GC IP v11.0.4 drm/amdgpu: enable GFX IP v11.0.4 CG support drm/amdgpu: Make amdgpu_ring_mux functions as static drm/amdgpu: generally allow over-commit during BO allocation drm/amd/display: fix array index out of bound error in DCN32 DML drm/amd/display: 3.2.215 drm/amd/display: set optimized required for comp buf changes drm/amd/display: Add debug option to skip PSR CRTC disable drm/amd/display: correct DML calc error of UrgentLatency drm/amd/display: correct static_screen_event_mask drm/amd/display: Ensure commit_streams returns the DC return code drm/amd/display: read invalid ddc pin status cause engine busy drm/amd/display: Bypass DET swath fill check for max clocks drm/amd/display: Disable uclk pstate for subvp pipes drm/amd/display: Fix DCN2.1 default DSC clocks drm/amd/display: Enable dp_hdmi21_pcon support drm/amd/display: prevent seamless boot on displays that don't have the preferred dig ...
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‎Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon

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What: /sys/devices/.../hwmon/hwmon<i>/in0_input
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RO. Current Voltage in millivolt.
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Only supported for particular Intel i915 graphics platforms.
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What: /sys/devices/.../hwmon/hwmon<i>/power1_max
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RW. Card reactive sustained (PL1/Tau) power limit in microwatts.
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The power controller will throttle the operating frequency
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if the power averaged over a window (typically seconds)
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exceeds this limit.
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Only supported for particular Intel i915 graphics platforms.
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What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RO. Card default power limit (default TDP setting).
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Only supported for particular Intel i915 graphics platforms.
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What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RW. Sustained power limit interval (Tau in PL1/Tau) in
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milliseconds over which sustained power is averaged.
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Only supported for particular Intel i915 graphics platforms.
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What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RW. Card reactive critical (I1) power limit in microwatts.
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Card reactive critical (I1) power limit in microwatts is exposed
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for client products. The power controller will throttle the
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operating frequency if the power averaged over a window exceeds
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this limit.
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Only supported for particular Intel i915 graphics platforms.
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What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RW. Card reactive critical (I1) power limit in milliamperes.
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Card reactive critical (I1) power limit in milliamperes is
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exposed for server products. The power controller will throttle
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the operating frequency if the power averaged over a window
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exceeds this limit.
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Only supported for particular Intel i915 graphics platforms.
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What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
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Date: February 2023
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KernelVersion: 6.2
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Contact: [email protected]
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Description: RO. Energy input of device or gt in microjoules.
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For i915 device level hwmon devices (name "i915") this
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reflects energy input for the entire device. For gt level
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hwmon devices (name "i915_gtN") this reflects energy input
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for the gt.
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Only supported for particular Intel i915 graphics platforms.

‎Documentation/accel/index.rst

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.. SPDX-License-Identifier: GPL-2.0
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====================
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Compute Accelerators
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====================
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.. toctree::
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:maxdepth: 1
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introduction
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.. only:: subproject and html
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Indices
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=======
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* :ref:`genindex`

‎Documentation/accel/introduction.rst

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.. SPDX-License-Identifier: GPL-2.0
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============
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Introduction
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============
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The Linux compute accelerators subsystem is designed to expose compute
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accelerators in a common way to user-space and provide a common set of
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functionality.
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These devices can be either stand-alone ASICs or IP blocks inside an SoC/GPU.
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Although these devices are typically designed to accelerate
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Machine-Learning (ML) and/or Deep-Learning (DL) computations, the accel layer
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is not limited to handling these types of accelerators.
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Typically, a compute accelerator will belong to one of the following
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categories:
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- Edge AI - doing inference at an edge device. It can be an embedded ASIC/FPGA,
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or an IP inside a SoC (e.g. laptop web camera). These devices
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are typically configured using registers and can work with or without DMA.
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- Inference data-center - single/multi user devices in a large server. This
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type of device can be stand-alone or an IP inside a SoC or a GPU. It will
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have on-board DRAM (to hold the DL topology), DMA engines and
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command submission queues (either kernel or user-space queues).
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It might also have an MMU to manage multiple users and might also enable
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virtualization (SR-IOV) to support multiple VMs on the same device. In
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addition, these devices will usually have some tools, such as profiler and
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debugger.
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- Training data-center - Similar to Inference data-center cards, but typically
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have more computational power and memory b/w (e.g. HBM) and will likely have
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a method of scaling-up/out, i.e. connecting to other training cards inside
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the server or in other servers, respectively.
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All these devices typically have different runtime user-space software stacks,
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that are tailored-made to their h/w. In addition, they will also probably
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include a compiler to generate programs to their custom-made computational
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engines. Typically, the common layer in user-space will be the DL frameworks,
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such as PyTorch and TensorFlow.
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Sharing code with DRM
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=====================
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Because this type of devices can be an IP inside GPUs or have similar
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characteristics as those of GPUs, the accel subsystem will use the
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DRM subsystem's code and functionality. i.e. the accel core code will
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be part of the DRM subsystem and an accel device will be a new type of DRM
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device.
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This will allow us to leverage the extensive DRM code-base and
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collaborate with DRM developers that have experience with this type of
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devices. In addition, new features that will be added for the accelerator
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drivers can be of use to GPU drivers as well.
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Differentiation from GPUs
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=========================
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Because we want to prevent the extensive user-space graphic software stack
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from trying to use an accelerator as a GPU, the compute accelerators will be
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differentiated from GPUs by using a new major number and new device char files.
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Furthermore, the drivers will be located in a separate place in the kernel
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tree - drivers/accel/.
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The accelerator devices will be exposed to the user space with the dedicated
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261 major number and will have the following convention:
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- device char files - /dev/accel/accel*
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- sysfs - /sys/class/accel/accel*/
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- debugfs - /sys/kernel/debug/accel/accel*/
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Getting Started
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===============
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First, read the DRM documentation at Documentation/gpu/index.rst.
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Not only it will explain how to write a new DRM driver but it will also
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contain all the information on how to contribute, the Code Of Conduct and
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what is the coding style/documentation. All of that is the same for the
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accel subsystem.
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Second, make sure the kernel is configured with CONFIG_DRM_ACCEL.
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To expose your device as an accelerator, two changes are needed to
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be done in your driver (as opposed to a standard DRM driver):
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- Add the DRIVER_COMPUTE_ACCEL feature flag in your drm_driver's
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driver_features field. It is important to note that this driver feature is
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mutually exclusive with DRIVER_RENDER and DRIVER_MODESET. Devices that want
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to expose both graphics and compute device char files should be handled by
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two drivers that are connected using the auxiliary bus framework.
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- Change the open callback in your driver fops structure to accel_open().
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Alternatively, your driver can use DEFINE_DRM_ACCEL_FOPS macro to easily
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set the correct function operations pointers structure.
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External References
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===================
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email threads
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-------------
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* `Initial discussion on the New subsystem for acceleration devices <https://lkml.org/lkml/2022/7/31/83>`_ - Oded Gabbay (2022)
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* `patch-set to add the new subsystem <https://lkml.org/lkml/2022/10/22/544>`_ - Oded Gabbay (2022)
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Conference talks
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----------------
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* `LPC 2022 Accelerators BOF outcomes summary <https://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html>`_ - Dave Airlie (2022)

‎Documentation/admin-guide/devices.txt

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...
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255 = /dev/osd255 256th OSD Device
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261 char Compute Acceleration Devices
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0 = /dev/accel/accel0 First acceleration device
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1 = /dev/accel/accel1 Second acceleration device
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...
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384-511 char RESERVED FOR DYNAMIC ASSIGNMENT
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Character devices that request a dynamic allocation of major
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number will take numbers starting from 511 and downward,

‎Documentation/admin-guide/kernel-parameters.txt

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shutdown the other cpus. Instead use the REBOOT_VECTOR
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irq.
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nomodeset Disable kernel modesetting. DRM drivers will not perform
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display-mode changes or accelerated rendering. Only the
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system framebuffer will be available for use if this was
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set-up by the firmware or boot loader.
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Useful as fallback, or for testing and debugging.
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nomodeset Disable kernel modesetting. Most systems' firmware
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sets up a display mode and provides framebuffer memory
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for output. With nomodeset, DRM and fbdev drivers will
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not load if they could possibly displace the pre-
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initialized output. Only the system framebuffer will
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be available for use. The respective drivers will not
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perform display-mode changes or accelerated rendering.
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Useful as error fallback, or for testing and debugging.
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nomodule Disable module load
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‎Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml

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properties:
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compatible:
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enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a64-mipi-dsi
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oneOf:
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- enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a64-mipi-dsi
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- allwinner,sun50i-a100-mipi-dsi
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- items:
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- const: allwinner,sun20i-d1-mipi-dsi
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- const: allwinner,sun50i-a100-mipi-dsi
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reg:
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maxItems: 1
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- phys
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- phy-names
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- resets
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- vcc-dsi-supply
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- port
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allOf:
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properties:
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compatible:
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contains:
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const: allwinner,sun6i-a31-mipi-dsi
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enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a100-mipi-dsi
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then:
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properties:
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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const: allwinner,sun50i-a64-mipi-dsi
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enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a64-mipi-dsi
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then:
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properties:
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clocks:
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minItems: 1
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required:
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- vcc-dsi-supply
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unevaluatedProperties: false
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