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swahlhpeKAGA-KOKO
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x86/platform/uv: Remove support for UV1 platform from x2apic_uv_x
UV1 is not longer supported. Signed-off-by: Steve Wahl <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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arch/x86/kernel/apic/x2apic_uv_x.c

Lines changed: 26 additions & 96 deletions
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,6 @@
2424
#include <asm/uv/uv.h>
2525
#include <asm/apic.h>
2626

27-
static DEFINE_PER_CPU(int, x2apic_extra_bits);
28-
2927
static enum uv_system_type uv_system_type;
3028
static int uv_hubbed_system;
3129
static int uv_hubless_system;
@@ -40,16 +38,14 @@ static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
4038
static struct {
4139
unsigned int apicid_shift;
4240
unsigned int apicid_mask;
43-
unsigned int socketid_shift; /* aka pnode_shift for UV1/2/3 */
41+
unsigned int socketid_shift; /* aka pnode_shift for UV2/3 */
4442
unsigned int pnode_mask;
4543
unsigned int gpa_shift;
4644
unsigned int gnode_shift;
4745
} uv_cpuid;
4846

4947
static int uv_min_hub_revision_id;
5048

51-
unsigned int uv_apicid_hibits;
52-
5349
static struct apic apic_x2apic_uv_x;
5450
static struct uv_hub_info_s uv_hub_info_node0;
5551

@@ -139,12 +135,8 @@ static void __init uv_tsc_check_sync(void)
139135
/* Accommodate different UV arch BIOSes */
140136
mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
141137
mmr_shift =
142-
is_uv1_hub() ? 0 :
143138
is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
144-
if (mmr_shift)
145-
sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
146-
else
147-
sync_state = 0;
139+
sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
148140

149141
switch (sync_state) {
150142
case UVH_TSC_SYNC_VALID:
@@ -223,21 +215,6 @@ static void __init early_get_apic_socketid_shift(void)
223215
pr_info("UV: socketid_shift:%d pnode_mask:0x%x\n", uv_cpuid.socketid_shift, uv_cpuid.pnode_mask);
224216
}
225217

226-
/*
227-
* Add an extra bit as dictated by bios to the destination apicid of
228-
* interrupts potentially passing through the UV HUB. This prevents
229-
* a deadlock between interrupts and IO port operations.
230-
*/
231-
static void __init uv_set_apicid_hibit(void)
232-
{
233-
union uv1h_lb_target_physical_apic_id_mask_u apicid_mask;
234-
235-
if (is_uv1_hub()) {
236-
apicid_mask.v = uv_early_read_mmr(UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK);
237-
uv_apicid_hibits = apicid_mask.s1.bit_enables & UV_APICID_HIBIT_MASK;
238-
}
239-
}
240-
241218
static void __init uv_stringify(int len, char *to, char *from)
242219
{
243220
/* Relies on 'to' being NULL chars so result will be NULL terminated */
@@ -280,36 +257,25 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, char *_oem_table_id)
280257

281258
/*
282259
* Determine UV arch type.
283-
* SGI: UV100/1000
284260
* SGI2: UV2000/3000
285261
* SGI3: UV300 (truncated to 4 chars because of different varieties)
286262
* SGI4: UV400 (truncated to 4 chars because of different varieties)
287263
*/
288-
uv_hub_info->hub_revision =
289-
!strncmp(oem_id, "SGI4", 4) ? UV4_HUB_REVISION_BASE :
290-
!strncmp(oem_id, "SGI3", 4) ? UV3_HUB_REVISION_BASE :
291-
!strcmp(oem_id, "SGI2") ? UV2_HUB_REVISION_BASE :
292-
!strcmp(oem_id, "SGI") ? UV1_HUB_REVISION_BASE : 0;
293-
294-
if (uv_hub_info->hub_revision == 0)
295-
goto badbios;
296-
297-
switch (uv_hub_info->hub_revision) {
298-
case UV4_HUB_REVISION_BASE:
264+
if (!strncmp(oem_id, "SGI4", 4)) {
265+
uv_hub_info->hub_revision = UV4_HUB_REVISION_BASE;
299266
uv_hubbed_system = 0x11;
300-
break;
301267

302-
case UV3_HUB_REVISION_BASE:
268+
} else if (!strncmp(oem_id, "SGI3", 4)) {
269+
uv_hub_info->hub_revision = UV3_HUB_REVISION_BASE;
303270
uv_hubbed_system = 0x9;
304-
break;
305271

306-
case UV2_HUB_REVISION_BASE:
272+
} else if (!strcmp(oem_id, "SGI2")) {
273+
uv_hub_info->hub_revision = UV2_HUB_REVISION_BASE;
307274
uv_hubbed_system = 0x5;
308-
break;
309275

310-
case UV1_HUB_REVISION_BASE:
311-
uv_hubbed_system = 0x3;
312-
break;
276+
} else {
277+
uv_hub_info->hub_revision = 0;
278+
goto badbios;
313279
}
314280

315281
pnodeid = early_get_pnodeid();
@@ -323,14 +289,6 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, char *_oem_table_id)
323289
uv_system_type = UV_X2APIC;
324290
uv_apic = 0;
325291

326-
} else if (!strcmp(oem_table_id, "UVH")) {
327-
/* Only UV1 systems: */
328-
uv_system_type = UV_NON_UNIQUE_APIC;
329-
x86_platform.legacy.warm_reset = 0;
330-
__this_cpu_write(x2apic_extra_bits, pnodeid << uvh_apicid.s.pnode_shift);
331-
uv_set_apicid_hibit();
332-
uv_apic = 1;
333-
334292
} else if (!strcmp(oem_table_id, "UVL")) {
335293
/* Only used for very small systems: */
336294
uv_system_type = UV_LEGACY_APIC;
@@ -347,7 +305,7 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, char *_oem_table_id)
347305

348306
badbios:
349307
pr_err("UV: OEM_ID:%s OEM_TABLE_ID:%s\n", oem_id, oem_table_id);
350-
pr_err("Current BIOS not supported, update kernel and/or BIOS\n");
308+
pr_err("Current UV Type or BIOS not supported\n");
351309
BUG();
352310
}
353311

@@ -545,7 +503,6 @@ static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
545503
int pnode;
546504

547505
pnode = uv_apicid_to_pnode(phys_apicid);
548-
phys_apicid |= uv_apicid_hibits;
549506

550507
val = (1UL << UVH_IPI_INT_SEND_SHFT) |
551508
(phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
@@ -576,7 +533,7 @@ static void uv_send_IPI_one(int cpu, int vector)
576533
dmode = dest_Fixed;
577534

578535
val = (1UL << UVH_IPI_INT_SEND_SHFT) |
579-
((apicid | uv_apicid_hibits) << UVH_IPI_INT_APIC_ID_SHFT) |
536+
(apicid << UVH_IPI_INT_APIC_ID_SHFT) |
580537
(dmode << UVH_IPI_INT_DELIVERY_MODE_SHFT) |
581538
(vector << UVH_IPI_INT_VECTOR_SHFT);
582539

@@ -634,22 +591,16 @@ static void uv_init_apic_ldr(void)
634591

635592
static u32 apic_uv_calc_apicid(unsigned int cpu)
636593
{
637-
return apic_default_calc_apicid(cpu) | uv_apicid_hibits;
594+
return apic_default_calc_apicid(cpu);
638595
}
639596

640-
static unsigned int x2apic_get_apic_id(unsigned long x)
597+
static unsigned int x2apic_get_apic_id(unsigned long id)
641598
{
642-
unsigned int id;
643-
644-
WARN_ON(preemptible() && num_online_cpus() > 1);
645-
id = x | __this_cpu_read(x2apic_extra_bits);
646-
647599
return id;
648600
}
649601

650602
static u32 set_apic_id(unsigned int id)
651603
{
652-
/* CHECKME: Do we need to mask out the xapic extra bits? */
653604
return id;
654605
}
655606

@@ -721,11 +672,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
721672
.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
722673
};
723674

724-
static void set_x2apic_extra_bits(int pnode)
725-
{
726-
__this_cpu_write(x2apic_extra_bits, pnode << uvh_apicid.s.pnode_shift);
727-
}
728-
729675
#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_LENGTH 3
730676
#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
731677

@@ -920,32 +866,23 @@ static __init void map_mmioh_high(int min_pnode, int max_pnode)
920866
return;
921867
}
922868

923-
if (is_uv1_hub()) {
924-
mmr = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR;
925-
shift = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT;
926-
mmioh.v = uv_read_local_mmr(mmr);
927-
enable = !!mmioh.s1.enable;
928-
base = mmioh.s1.base;
929-
m_io = mmioh.s1.m_io;
930-
n_io = mmioh.s1.n_io;
931-
} else if (is_uv2_hub()) {
869+
if (is_uv2_hub()) {
932870
mmr = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR;
933871
shift = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT;
934872
mmioh.v = uv_read_local_mmr(mmr);
935873
enable = !!mmioh.s2.enable;
936874
base = mmioh.s2.base;
937875
m_io = mmioh.s2.m_io;
938876
n_io = mmioh.s2.n_io;
939-
} else {
940-
return;
941-
}
942877

943-
if (enable) {
944-
max_pnode &= (1 << n_io) - 1;
945-
pr_info("UV: base:0x%lx shift:%d N_IO:%d M_IO:%d max_pnode:0x%x\n", base, shift, m_io, n_io, max_pnode);
946-
map_high("MMIOH", base, shift, m_io, max_pnode, map_uc);
947-
} else {
948-
pr_info("UV: MMIOH disabled\n");
878+
if (enable) {
879+
max_pnode &= (1 << n_io) - 1;
880+
pr_info("UV: base:0x%lx shift:%d N_IO:%d M_IO:%d max_pnode:0x%x\n",
881+
base, shift, m_io, n_io, max_pnode);
882+
map_high("MMIOH", base, shift, m_io, max_pnode, map_uc);
883+
} else {
884+
pr_info("UV: MMIOH disabled\n");
885+
}
949886
}
950887
}
951888

@@ -1081,9 +1018,6 @@ void uv_cpu_init(void)
10811018
return;
10821019

10831020
uv_hub_info->nr_online_cpus++;
1084-
1085-
if (get_uv_system_type() == UV_NON_UNIQUE_APIC)
1086-
set_x2apic_extra_bits(uv_hub_info->pnode);
10871021
}
10881022

10891023
struct mn {
@@ -1114,9 +1048,6 @@ static void get_mn(struct mn *mnp)
11141048
} else if (is_uv2_hub()) {
11151049
mnp->m_val = m_n_config.s2.m_skt;
11161050
mnp->n_lshift = mnp->m_val == 40 ? 40 : 39;
1117-
} else if (is_uv1_hub()) {
1118-
mnp->m_val = m_n_config.s1.m_skt;
1119-
mnp->n_lshift = mnp->m_val;
11201051
}
11211052
mnp->m_shift = mnp->m_val ? 64 - mnp->m_val : 0;
11221053
}
@@ -1318,7 +1249,7 @@ static void __init build_socket_tables(void)
13181249
size_t bytes;
13191250

13201251
if (!gre) {
1321-
if (is_uv1_hub() || is_uv2_hub() || is_uv3_hub()) {
1252+
if (is_uv2_hub() || is_uv3_hub()) {
13221253
pr_info("UV: No UVsystab socket table, ignoring\n");
13231254
return;
13241255
}
@@ -1500,8 +1431,7 @@ static void __init uv_system_init_hub(void)
15001431
unsigned short min_pnode = 9999, max_pnode = 0;
15011432
char *hub = is_uv4_hub() ? "UV400" :
15021433
is_uv3_hub() ? "UV300" :
1503-
is_uv2_hub() ? "UV2000/3000" :
1504-
is_uv1_hub() ? "UV100/1000" : NULL;
1434+
is_uv2_hub() ? "UV2000/3000" : NULL;
15051435

15061436
if (!hub) {
15071437
pr_err("UV: Unknown/unsupported UV hub\n");

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