@@ -1538,6 +1538,43 @@ static const char * const rk_udphy_rst_list[] = {
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"init" , "cmn" , "lane" , "pcs_apb" , "pma_apb"
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};
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+ static const struct rk_udphy_cfg rk3576_udphy_cfgs = {
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+ .num_phys = 1 ,
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+ .phy_ids = { 0x2b010000 },
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+ .num_rsts = ARRAY_SIZE (rk_udphy_rst_list ),
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+ .rst_list = rk_udphy_rst_list ,
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+ .grfcfg = {
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+ /* u2phy-grf */
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+ .bvalid_phy_con = RK_UDPHY_GEN_GRF_REG (0x0010 , 1 , 0 , 0x2 , 0x3 ),
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+ .bvalid_grf_con = RK_UDPHY_GEN_GRF_REG (0x0000 , 15 , 14 , 0x1 , 0x3 ),
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+
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+ /* usb-grf */
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+ .usb3otg0_cfg = RK_UDPHY_GEN_GRF_REG (0x0030 , 15 , 0 , 0x1100 , 0x0188 ),
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+
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+ /* usbdpphy-grf */
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+ .low_pwrn = RK_UDPHY_GEN_GRF_REG (0x0004 , 13 , 13 , 0 , 1 ),
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+ .rx_lfps = RK_UDPHY_GEN_GRF_REG (0x0004 , 14 , 14 , 0 , 1 ),
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+ },
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+ .vogrfcfg = {
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+ {
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+ .hpd_trigger = RK_UDPHY_GEN_GRF_REG (0x0000 , 11 , 10 , 1 , 3 ),
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+ .dp_lane_reg = 0x0000 ,
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+ },
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+ },
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+ .dp_tx_ctrl_cfg = {
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+ rk3588_dp_tx_drv_ctrl_rbr_hbr_typec ,
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+ rk3588_dp_tx_drv_ctrl_rbr_hbr_typec ,
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+ rk3588_dp_tx_drv_ctrl_hbr2 ,
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+ rk3588_dp_tx_drv_ctrl_hbr3 ,
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+ },
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+ .dp_tx_ctrl_cfg_typec = {
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+ rk3588_dp_tx_drv_ctrl_rbr_hbr_typec ,
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+ rk3588_dp_tx_drv_ctrl_rbr_hbr_typec ,
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+ rk3588_dp_tx_drv_ctrl_hbr2 ,
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+ rk3588_dp_tx_drv_ctrl_hbr3 ,
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+ },
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+ };
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+
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static const struct rk_udphy_cfg rk3588_udphy_cfgs = {
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.num_phys = 2 ,
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.phy_ids = {
@@ -1584,6 +1621,10 @@ static const struct rk_udphy_cfg rk3588_udphy_cfgs = {
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};
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static const struct of_device_id rk_udphy_dt_match [] = {
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+ {
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+ .compatible = "rockchip,rk3576-usbdp-phy" ,
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+ .data = & rk3576_udphy_cfgs
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+ },
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{
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.compatible = "rockchip,rk3588-usbdp-phy" ,
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.data = & rk3588_udphy_cfgs
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