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9 | 9 | #define pr_fmt(fmt) "%s: " fmt, __func__
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10 | 10 |
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11 | 11 | #include <linux/bitmap.h>
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| 12 | +#include <linux/cpu.h> |
12 | 13 | #include <linux/debugfs.h>
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13 | 14 | #include <linux/export.h>
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14 | 15 | #include <linux/io.h>
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19 | 20 | #include <linux/of.h>
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20 | 21 | #include <linux/of_platform.h>
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21 | 22 | #include <linux/platform_device.h>
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| 23 | +#include <linux/pm_qos.h> |
22 | 24 | #include <linux/property.h>
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23 | 25 | #include <linux/semaphore.h>
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24 | 26 | #include <linux/slab.h>
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@@ -3666,7 +3668,27 @@ static int ti_sci_prepare_system_suspend(struct ti_sci_info *info)
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3666 | 3668 | static int __maybe_unused ti_sci_suspend(struct device *dev)
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3667 | 3669 | {
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3668 | 3670 | struct ti_sci_info *info = dev_get_drvdata(dev);
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3669 |
| - int ret; |
| 3671 | + struct device *cpu_dev, *cpu_dev_max = NULL; |
| 3672 | + s32 val, cpu_lat = 0; |
| 3673 | + int i, ret; |
| 3674 | + |
| 3675 | + if (info->fw_caps & MSG_FLAG_CAPS_LPM_DM_MANAGED) { |
| 3676 | + for_each_possible_cpu(i) { |
| 3677 | + cpu_dev = get_cpu_device(i); |
| 3678 | + val = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_RESUME_LATENCY); |
| 3679 | + if (val != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT) { |
| 3680 | + cpu_lat = max(cpu_lat, val); |
| 3681 | + cpu_dev_max = cpu_dev; |
| 3682 | + } |
| 3683 | + } |
| 3684 | + if (cpu_dev_max) { |
| 3685 | + dev_dbg(cpu_dev_max, "%s: sending max CPU latency=%u\n", __func__, cpu_lat); |
| 3686 | + ret = ti_sci_cmd_set_latency_constraint(&info->handle, |
| 3687 | + cpu_lat, TISCI_MSG_CONSTRAINT_SET); |
| 3688 | + if (ret) |
| 3689 | + return ret; |
| 3690 | + } |
| 3691 | + } |
3670 | 3692 |
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3671 | 3693 | ret = ti_sci_prepare_system_suspend(info);
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3672 | 3694 | if (ret)
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