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Merge tag 'qcom-dts-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM32 DeviceTree updates for v6.4 stdout-path is defined for the ALFA Network AP120C-AC, to avoid the need to pass this information on the kernel commandline. Ath10k is wired up to read calibration data from the "ART" partition. PCI I/O port ranges are fixed on IPQ4019 and IPQ8064. Supply clocks are defined for KPSS L2CC and ACC clock controllers. Supply clocks for the global clock controller are being specified on IPQ4019, MSM8974 and MSM8226. PCIe RC support is enabled on the SDX55 T55 development board, IPA is defined for the SDX55 and a number of cleanup patches are introduced. Compatibles for QRB2210/QCM2290, IPQ9574, QRD8550 and IPQ5332 platforms are added, and the RB1, Yiming LTE dongle, Xiaomi Mi A3, MI01.2 and MI01.6 boards. * tag 'qcom-dts-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (28 commits) dt-bindings: arm: qcom: Add Yiming LTE dongle uz801-v3.0 (yiming-uz801v3) dt-bindings: vendor-prefixes: Add Henan Yiming Technology Co., Ltd. ARM: dts: qcom: sdx55: add dedicated SDX55 TCSR compatible ARM: dts: qcom: sdx55-t55: Move "status" property down ARM: dts: qcom: sdx55-t55: Enable PCIe RC support ARM: dts: qcom: sdx55: List the property values vertically ARM: dts: qcom: sdx55: Add support for PCIe RC controller ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node ARM: dts: qcom: ipq8064: Fix the PCI I/O port range ARM: dts: qcom: ipq4019: Fix the PCI I/O port range ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM ranges dt-bindings: arm: qcom: Add ipq9574 compatible ARM: dts: qcom: msm8974: add correct XO clock source to GCC node ARM: dts: qcom: msm8226: add clocks and clock-names to GCC node ARM: dts: qcom: rename kpss-acc-v2 nodes to power-manager nodes ARM: dts: qcom: add missing clock configuration for kpss-acc-v1 ARM: dts: qcom: add and fix clock configuration for kpss-gcc nodes ARM: dts: qcom: add per SoC compatible for qcom,kpss-gcc nodes dt-bindings: qcom: add ipq5332 boards ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents c47b89b + 26c56db commit a8127d2

15 files changed

+304
-80
lines changed

‎Documentation/devicetree/bindings/arm/qcom.yaml

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,10 @@ description: |
3030
apq8084
3131
apq8096
3232
ipq4018
33+
ipq5332
3334
ipq6018
3435
ipq8074
36+
ipq9574
3537
mdm9615
3638
msm8226
3739
msm8916
@@ -80,6 +82,8 @@ description: |
8082
The 'board' element must be one of the following strings:
8183
8284
adp
85+
ap-al02-c7
86+
ap-mi01.2
8387
cdp
8488
cp01-c1
8589
dragonboard
@@ -226,6 +230,7 @@ properties:
226230
- thwc,uf896
227231
- thwc,ufi001c
228232
- wingtech,wt88047
233+
- yiming,uz801-v3
229234
- const: qcom,msm8916
230235

231236
- items:
@@ -320,6 +325,11 @@ properties:
320325
- qcom,ipq4019-dk04.1-c1
321326
- const: qcom,ipq4019
322327

328+
- items:
329+
- enum:
330+
- qcom,ipq5332-ap-mi01.2
331+
- const: qcom,ipq5332
332+
323333
- items:
324334
- enum:
325335
- mikrotik,rb3011
@@ -333,6 +343,11 @@ properties:
333343
- qcom,ipq8074-hk10-c2
334344
- const: qcom,ipq8074
335345

346+
- items:
347+
- enum:
348+
- qcom,ipq9574-ap-al02-c7
349+
- const: qcom,ipq9574
350+
336351
- description: Sierra Wireless MangOH Green with WP8548 Module
337352
items:
338353
- const: swir,mangoh-green-wp8548
@@ -913,6 +928,7 @@ properties:
913928
- items:
914929
- enum:
915930
- qcom,sm8550-mtp
931+
- qcom,sm8550-qrd
916932
- const: qcom,sm8550
917933

918934
# Board compatibles go above

‎Documentation/devicetree/bindings/vendor-prefixes.yaml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1538,6 +1538,8 @@ patternProperties:
15381538
description: Yes Optoelectronics Co.,Ltd.
15391539
"^yic,.*":
15401540
description: YIC System Co., Ltd.
1541+
"^yiming,.*":
1542+
description: Henan Yiming Technology Co., Ltd.
15411543
"^ylm,.*":
15421544
description: Shenzhen Yangliming Electronic Technology Co., Ltd.
15431545
"^yna,.*":

‎arch/arm/boot/dts/qcom-apq8064.dtsi

Lines changed: 23 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -388,21 +388,37 @@
388388
acc0: clock-controller@2088000 {
389389
compatible = "qcom,kpss-acc-v1";
390390
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
391+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
392+
clock-names = "pll8_vote", "pxo";
393+
clock-output-names = "acpu0_aux";
394+
#clock-cells = <0>;
391395
};
392396

393397
acc1: clock-controller@2098000 {
394398
compatible = "qcom,kpss-acc-v1";
395399
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
400+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
401+
clock-names = "pll8_vote", "pxo";
402+
clock-output-names = "acpu1_aux";
403+
#clock-cells = <0>;
396404
};
397405

398406
acc2: clock-controller@20a8000 {
399407
compatible = "qcom,kpss-acc-v1";
400408
reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;
409+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
410+
clock-names = "pll8_vote", "pxo";
411+
clock-output-names = "acpu2_aux";
412+
#clock-cells = <0>;
401413
};
402414

403415
acc3: clock-controller@20b8000 {
404416
compatible = "qcom,kpss-acc-v1";
405417
reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;
418+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
419+
clock-names = "pll8_vote", "pxo";
420+
clock-output-names = "acpu3_aux";
421+
#clock-cells = <0>;
406422
};
407423

408424
saw0: power-controller@2089000 {
@@ -879,8 +895,11 @@
879895
};
880896

881897
l2cc: clock-controller@2011000 {
882-
compatible = "qcom,kpss-gcc", "syscon";
898+
compatible = "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc", "syscon";
883899
reg = <0x2011000 0x1000>;
900+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
901+
clock-names = "pll8_vote", "pxo";
902+
#clock-cells = <0>;
884903
};
885904

886905
rpm: rpm@108000 {
@@ -1260,7 +1279,7 @@
12601279
gpu_opp_table: opp-table {
12611280
compatible = "operating-points-v2";
12621281

1263-
opp-320000000 {
1282+
opp-450000000 {
12641283
opp-hz = /bits/ 64 <450000000>;
12651284
};
12661285

@@ -1494,8 +1513,8 @@
14941513
num-lanes = <1>;
14951514
#address-cells = <3>;
14961515
#size-cells = <2>;
1497-
ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, /* I/O */
1498-
<0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* mem */
1516+
ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */
1517+
<0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */
14991518
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
15001519
interrupt-names = "msi";
15011520
#interrupt-cells = <1>;

‎arch/arm/boot/dts/qcom-apq8084.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -654,25 +654,25 @@
654654
regulator;
655655
};
656656

657-
acc0: clock-controller@f9088000 {
657+
acc0: power-manager@f9088000 {
658658
compatible = "qcom,kpss-acc-v2";
659659
reg = <0xf9088000 0x1000>,
660660
<0xf9008000 0x1000>;
661661
};
662662

663-
acc1: clock-controller@f9098000 {
663+
acc1: power-manager@f9098000 {
664664
compatible = "qcom,kpss-acc-v2";
665665
reg = <0xf9098000 0x1000>,
666666
<0xf9008000 0x1000>;
667667
};
668668

669-
acc2: clock-controller@f90a8000 {
669+
acc2: power-manager@f90a8000 {
670670
compatible = "qcom,kpss-acc-v2";
671671
reg = <0xf90a8000 0x1000>,
672672
<0xf9008000 0x1000>;
673673
};
674674

675-
acc3: clock-controller@f90b8000 {
675+
acc3: power-manager@f90b8000 {
676676
compatible = "qcom,kpss-acc-v2";
677677
reg = <0xf90b8000 0x1000>,
678678
<0xf9008000 0x1000>;

‎arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi

Lines changed: 25 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,14 @@
88
model = "ALFA Network AP120C-AC";
99
compatible = "alfa-network,ap120c-ac", "qcom,ipq4018";
1010

11+
aliases {
12+
serial0 = &blsp1_uart1;
13+
};
14+
15+
chosen {
16+
stdout-path = "serial0:115200n8";
17+
};
18+
1119
keys {
1220
compatible = "gpio-keys";
1321

@@ -68,7 +76,7 @@
6876
};
6977
};
7078

71-
usb-power {
79+
usb-power-hog {
7280
line-name = "USB-power";
7381
gpios = <1 GPIO_ACTIVE_HIGH>;
7482
gpio-hog;
@@ -162,6 +170,17 @@
162170
label = "ART";
163171
reg = <0x00170000 0x00010000>;
164172
read-only;
173+
compatible = "nvmem-cells";
174+
#address-cells = <1>;
175+
#size-cells = <1>;
176+
177+
precal_art_1000: precal@1000 {
178+
reg = <0x1000 0x2f20>;
179+
};
180+
181+
precal_art_5000: precal@5000 {
182+
reg = <0x5000 0x2f20>;
183+
};
165184
};
166185

167186
partition@180000 {
@@ -178,7 +197,7 @@
178197
};
179198
};
180199

181-
nand@1 {
200+
flash@1 {
182201
compatible = "spi-nand";
183202
reg = <1>;
184203
spi-max-frequency = <40000000>;
@@ -225,10 +244,14 @@
225244

226245
&wifi0 {
227246
status = "okay";
247+
nvmem-cell-names = "pre-calibration";
248+
nvmem-cells = <&precal_art_1000>;
228249
};
229250

230251
&wifi1 {
231252
status = "okay";
253+
nvmem-cell-names = "pre-calibration";
254+
nvmem-cells = <&precal_art_5000>;
232255
qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
233256
};
234257

‎arch/arm/boot/dts/qcom-ipq4019.dtsi

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,6 @@
143143
sleep_clk: sleep_clk {
144144
compatible = "fixed-clock";
145145
clock-frequency = <32000>;
146-
clock-output-names = "gcc_sleep_clk_src";
147146
#clock-cells = <0>;
148147
};
149148

@@ -190,6 +189,8 @@
190189
#power-domain-cells = <1>;
191190
#reset-cells = <1>;
192191
reg = <0x1800000 0x60000>;
192+
clocks = <&xo>, <&sleep_clk>;
193+
clock-names = "xo", "sleep_clk";
193194
};
194195

195196
prng: rng@22000 {
@@ -325,22 +326,22 @@
325326
status = "disabled";
326327
};
327328

328-
acc0: clock-controller@b088000 {
329+
acc0: power-manager@b088000 {
329330
compatible = "qcom,kpss-acc-v2";
330331
reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
331332
};
332333

333-
acc1: clock-controller@b098000 {
334+
acc1: power-manager@b098000 {
334335
compatible = "qcom,kpss-acc-v2";
335336
reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
336337
};
337338

338-
acc2: clock-controller@b0a8000 {
339+
acc2: power-manager@b0a8000 {
339340
compatible = "qcom,kpss-acc-v2";
340341
reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
341342
};
342343

343-
acc3: clock-controller@b0b8000 {
344+
acc3: power-manager@b0b8000 {
344345
compatible = "qcom,kpss-acc-v2";
345346
reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
346347
};
@@ -426,8 +427,8 @@
426427
#address-cells = <3>;
427428
#size-cells = <2>;
428429

429-
ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
430-
<0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;
430+
ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>,
431+
<0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>;
431432

432433
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
433434
interrupt-names = "msi";

‎arch/arm/boot/dts/qcom-ipq8064.dtsi

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -569,16 +569,20 @@
569569
};
570570

571571
l2cc: clock-controller@2011000 {
572-
compatible = "qcom,kpss-gcc", "syscon";
572+
compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
573573
reg = <0x02011000 0x1000>;
574574
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
575575
clock-names = "pll8_vote", "pxo";
576-
clock-output-names = "acpu_l2_aux";
576+
#clock-cells = <0>;
577577
};
578578

579579
acc0: clock-controller@2088000 {
580580
compatible = "qcom,kpss-acc-v1";
581581
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
582+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
583+
clock-names = "pll8_vote", "pxo";
584+
clock-output-names = "acpu0_aux";
585+
#clock-cells = <0>;
582586
};
583587

584588
saw0: regulator@2089000 {
@@ -590,6 +594,10 @@
590594
acc1: clock-controller@2098000 {
591595
compatible = "qcom,kpss-acc-v1";
592596
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
597+
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
598+
clock-names = "pll8_vote", "pxo";
599+
clock-output-names = "acpu1_aux";
600+
#clock-cells = <0>;
593601
};
594602

595603
saw1: regulator@2099000 {
@@ -1081,8 +1089,8 @@
10811089
#address-cells = <3>;
10821090
#size-cells = <2>;
10831091

1084-
ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */
1085-
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
1092+
ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000 /* I/O */
1093+
0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */
10861094

10871095
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
10881096
interrupt-names = "msi";
@@ -1132,8 +1140,8 @@
11321140
#address-cells = <3>;
11331141
#size-cells = <2>;
11341142

1135-
ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */
1136-
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
1143+
ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000 /* I/O */
1144+
0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */
11371145

11381146
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
11391147
interrupt-names = "msi";
@@ -1183,8 +1191,8 @@
11831191
#address-cells = <3>;
11841192
#size-cells = <2>;
11851193

1186-
ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */
1187-
0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
1194+
ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000 /* I/O */
1195+
0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */
11881196

11891197
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
11901198
interrupt-names = "msi";

‎arch/arm/boot/dts/qcom-mdm9615.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,7 @@
116116
};
117117

118118
l2cc: clock-controller@2011000 {
119-
compatible = "qcom,kpss-gcc", "syscon";
119+
compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";
120120
reg = <0x02011000 0x1000>;
121121
};
122122

‎arch/arm/boot/dts/qcom-msm8226.dtsi

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include <dt-bindings/interrupt-controller/arm-gic.h>
99
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
1010
#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
11+
#include <dt-bindings/clock/qcom,rpmcc.h>
1112
#include <dt-bindings/gpio/gpio.h>
1213
#include <dt-bindings/power/qcom-rpmpd.h>
1314
#include <dt-bindings/reset/qcom,gcc-msm8974.h>
@@ -377,6 +378,11 @@
377378
#clock-cells = <1>;
378379
#reset-cells = <1>;
379380
#power-domain-cells = <1>;
381+
382+
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
383+
<&sleep_clk>;
384+
clock-names = "xo",
385+
"sleep_clk";
380386
};
381387

382388
mmcc: clock-controller@fd8c0000 {

‎arch/arm/boot/dts/qcom-msm8660.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -473,7 +473,7 @@
473473
};
474474

475475
l2cc: clock-controller@2082000 {
476-
compatible = "qcom,kpss-gcc", "syscon";
476+
compatible = "qcom,kpss-gcc-msm8660", "qcom,kpss-gcc", "syscon";
477477
reg = <0x02082000 0x1000>;
478478
};
479479

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