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Sergey Shtylyovglaubitz
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sh: Avoid using IRQ0 on SH3 and SH4
IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now return -EINVAL instead. However, the kernel code supporting SH3/4-based SoCs still maps the IRQ #s starting at 0 -- modify that code to start the IRQ #s from 16 instead. The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they indeed are using IRQ0 for the SMSC911x compatible Ethernet chip. Fixes: ce753ad ("platform: finally disallow IRQ0 in platform_get_irq() and its ilk") Signed-off-by: Sergey Shtylyov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Tested-by: Geert Uytterhoeven <[email protected]> Reviewed-by: John Paul Adrian Glaubitz <[email protected]> Tested-by: John Paul Adrian Glaubitz <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: John Paul Adrian Glaubitz <[email protected]>
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arch/sh/include/mach-common/mach/highlander.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,7 @@
176176
#define IVDR_CK_ON 4 /* iVDR Clock ON */
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#endif
178178

179-
#define HL_FPGA_IRQ_BASE 200
179+
#define HL_FPGA_IRQ_BASE (200 + 16)
180180
#define HL_NR_IRL 15
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182182
#define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0)

arch/sh/include/mach-common/mach/r2d.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@
4747

4848
#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
4949

50-
#define R2D_FPGA_IRQ_BASE 100
50+
#define R2D_FPGA_IRQ_BASE (100 + 16)
5151

5252
#define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0)
5353
#define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1)

arch/sh/include/mach-dreamcast/mach/sysasic.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
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takes.
2323
*/
2424

25-
#define HW_EVENT_IRQ_BASE 48
25+
#define HW_EVENT_IRQ_BASE (48 + 16)
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2727
/* IRQ 13 */
2828
#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */

arch/sh/include/mach-se/mach/se7724.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@
3737
#define IRQ2_IRQ evt2irq(0x640)
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3939
/* Bits in IRQ012 registers */
40-
#define SE7724_FPGA_IRQ_BASE 220
40+
#define SE7724_FPGA_IRQ_BASE (220 + 16)
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4242
/* IRQ0 */
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#define IRQ0_BASE SE7724_FPGA_IRQ_BASE

arch/sh/kernel/cpu/sh3/entry.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
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mov r4, r0 ! save vector->jmp table offset for later
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472472
shlr2 r4 ! vector to IRQ# conversion
473-
add #-0x10, r4
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475-
cmp/pz r4 ! is it a valid IRQ?
474+
mov #0x10, r5
475+
cmp/hs r5, r4 ! is it a valid IRQ?
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bt 10f
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478478
/*

include/linux/sh_intc.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,9 @@
1313
/*
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* Convert back and forth between INTEVT and IRQ values.
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*/
16-
#ifdef CONFIG_CPU_HAS_INTEVT
17-
#define evt2irq(evt) (((evt) >> 5) - 16)
18-
#define irq2evt(irq) (((irq) + 16) << 5)
16+
#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */
17+
#define evt2irq(evt) ((evt) >> 5)
18+
#define irq2evt(irq) ((irq) << 5)
1919
#else
2020
#define evt2irq(evt) (evt)
2121
#define irq2evt(irq) (irq)

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