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jbrandebanguy11
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igc: field get conversion
Refactor the igc driver to use FIELD_GET() for mask and shift reads, which reduces lines of code and adds clarity of intent. This code was generated by the following coccinelle/spatch script and then manually repaired in a later patch. @get@ constant shift,mask; type T; expression a; @@ -((T)((a) & mask) >> shift) +FIELD_GET(mask, a) and applied via: spatch --sp-file field_prep.cocci --in-place --dir \ drivers/net/ethernet/intel/ Cc: Julia Lawall <[email protected]> Reviewed-by: Marcin Szycik <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Jesse Brandeburg <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
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4 files changed

+8
-13
lines changed

4 files changed

+8
-13
lines changed

drivers/net/ethernet/intel/igc/igc_base.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -68,8 +68,7 @@ static s32 igc_init_nvm_params_base(struct igc_hw *hw)
6868
u32 eecd = rd32(IGC_EECD);
6969
u16 size;
7070

71-
size = (u16)((eecd & IGC_EECD_SIZE_EX_MASK) >>
72-
IGC_EECD_SIZE_EX_SHIFT);
71+
size = FIELD_GET(IGC_EECD_SIZE_EX_MASK, eecd);
7372

7473
/* Added to a constant, "size" becomes the left-shift value
7574
* for setting word_size.
@@ -162,8 +161,7 @@ static s32 igc_init_phy_params_base(struct igc_hw *hw)
162161
phy->reset_delay_us = 100;
163162

164163
/* set lan id */
165-
hw->bus.func = (rd32(IGC_STATUS) & IGC_STATUS_FUNC_MASK) >>
166-
IGC_STATUS_FUNC_SHIFT;
164+
hw->bus.func = FIELD_GET(IGC_STATUS_FUNC_MASK, rd32(IGC_STATUS));
167165

168166
/* Make sure the PHY is in a good state. Several people have reported
169167
* firmware leaving the PHY's page select register set to something

drivers/net/ethernet/intel/igc/igc_i225.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -579,9 +579,8 @@ s32 igc_set_ltr_i225(struct igc_hw *hw, bool link)
579579

580580
/* Calculate tw_system (nsec). */
581581
if (speed == SPEED_100) {
582-
tw_system = ((rd32(IGC_EEE_SU) &
583-
IGC_TW_SYSTEM_100_MASK) >>
584-
IGC_TW_SYSTEM_100_SHIFT) * 500;
582+
tw_system = FIELD_GET(IGC_TW_SYSTEM_100_MASK,
583+
rd32(IGC_EEE_SU)) * 500;
585584
} else {
586585
tw_system = (rd32(IGC_EEE_SU) &
587586
IGC_TW_SYSTEM_1000_MASK) * 500;

drivers/net/ethernet/intel/igc/igc_main.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3712,8 +3712,7 @@ static int igc_enable_nfc_rule(struct igc_adapter *adapter,
37123712
}
37133713

37143714
if (rule->filter.match_flags & IGC_FILTER_FLAG_VLAN_TCI) {
3715-
int prio = (rule->filter.vlan_tci & VLAN_PRIO_MASK) >>
3716-
VLAN_PRIO_SHIFT;
3715+
int prio = FIELD_GET(VLAN_PRIO_MASK, rule->filter.vlan_tci);
37173716

37183717
err = igc_add_vlan_prio_filter(adapter, prio, rule->action);
37193718
if (err)
@@ -3735,8 +3734,7 @@ static void igc_disable_nfc_rule(struct igc_adapter *adapter,
37353734
igc_del_etype_filter(adapter, rule->filter.etype);
37363735

37373736
if (rule->filter.match_flags & IGC_FILTER_FLAG_VLAN_TCI) {
3738-
int prio = (rule->filter.vlan_tci & VLAN_PRIO_MASK) >>
3739-
VLAN_PRIO_SHIFT;
3737+
int prio = FIELD_GET(VLAN_PRIO_MASK, rule->filter.vlan_tci);
37403738

37413739
igc_del_vlan_prio_filter(adapter, prio);
37423740
}

drivers/net/ethernet/intel/igc/igc_phy.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -727,7 +727,7 @@ static s32 igc_write_xmdio_reg(struct igc_hw *hw, u16 addr,
727727
*/
728728
s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)
729729
{
730-
u8 dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;
730+
u8 dev_addr = FIELD_GET(GPY_MMD_MASK, offset);
731731
s32 ret_val;
732732

733733
offset = offset & GPY_REG_MASK;
@@ -758,7 +758,7 @@ s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)
758758
*/
759759
s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)
760760
{
761-
u8 dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;
761+
u8 dev_addr = FIELD_GET(GPY_MMD_MASK, offset);
762762
s32 ret_val;
763763

764764
offset = offset & GPY_REG_MASK;

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