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sgruszkajlawryno
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accel/ivpu: Fix power down sequence
Remove FPGA workaround on power_down to skip checking for noc quiescent state. Put VPU in reset before powering it down and skip manipulating registers that are reset by the VPU reset. This fixes power down errors where VPU is powered down just after VPU is booted. Fixes: 35b1376 ("accel/ivpu: Introduce a new DRM driver for Intel VPU") Signed-off-by: Stanislaw Gruszka <[email protected]> Reviewed-by: Jeffrey Hugo <[email protected]> Signed-off-by: Jacek Lawrynowicz <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/accel/ivpu/ivpu_hw_mtl.c

Lines changed: 2 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -403,11 +403,6 @@ static int ivpu_boot_host_ss_axi_enable(struct ivpu_device *vdev)
403403
return ivpu_boot_host_ss_axi_drive(vdev, true);
404404
}
405405

406-
static int ivpu_boot_host_ss_axi_disable(struct ivpu_device *vdev)
407-
{
408-
return ivpu_boot_host_ss_axi_drive(vdev, false);
409-
}
410-
411406
static int ivpu_boot_host_ss_top_noc_drive(struct ivpu_device *vdev, bool enable)
412407
{
413408
int ret;
@@ -441,11 +436,6 @@ static int ivpu_boot_host_ss_top_noc_enable(struct ivpu_device *vdev)
441436
return ivpu_boot_host_ss_top_noc_drive(vdev, true);
442437
}
443438

444-
static int ivpu_boot_host_ss_top_noc_disable(struct ivpu_device *vdev)
445-
{
446-
return ivpu_boot_host_ss_top_noc_drive(vdev, false);
447-
}
448-
449439
static void ivpu_boot_pwr_island_trickle_drive(struct ivpu_device *vdev, bool enable)
450440
{
451441
u32 val = REGV_RD32(MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0);
@@ -504,16 +494,6 @@ static void ivpu_boot_dpu_active_drive(struct ivpu_device *vdev, bool enable)
504494
REGV_WR32(MTL_VPU_HOST_SS_AON_DPU_ACTIVE, val);
505495
}
506496

507-
static int ivpu_boot_pwr_domain_disable(struct ivpu_device *vdev)
508-
{
509-
ivpu_boot_dpu_active_drive(vdev, false);
510-
ivpu_boot_pwr_island_isolation_drive(vdev, true);
511-
ivpu_boot_pwr_island_trickle_drive(vdev, false);
512-
ivpu_boot_pwr_island_drive(vdev, false);
513-
514-
return ivpu_boot_wait_for_pwr_island_status(vdev, 0x0);
515-
}
516-
517497
static int ivpu_boot_pwr_domain_enable(struct ivpu_device *vdev)
518498
{
519499
int ret;
@@ -797,21 +777,8 @@ static int ivpu_hw_mtl_power_down(struct ivpu_device *vdev)
797777
{
798778
int ret = 0;
799779

800-
/* FPGA requires manual clearing of IP_Reset bit by enabling quiescent state */
801-
if (ivpu_is_fpga(vdev)) {
802-
if (ivpu_boot_host_ss_top_noc_disable(vdev)) {
803-
ivpu_err(vdev, "Failed to disable TOP NOC\n");
804-
ret = -EIO;
805-
}
806-
807-
if (ivpu_boot_host_ss_axi_disable(vdev)) {
808-
ivpu_err(vdev, "Failed to disable AXI\n");
809-
ret = -EIO;
810-
}
811-
}
812-
813-
if (ivpu_boot_pwr_domain_disable(vdev)) {
814-
ivpu_err(vdev, "Failed to disable power domain\n");
780+
if (ivpu_hw_mtl_reset(vdev)) {
781+
ivpu_err(vdev, "Failed to reset the VPU\n");
815782
ret = -EIO;
816783
}
817784

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