Skip to content

Commit aa5119c

Browse files
ItsNayabSDjic23
authored andcommitted
iio: adc: at91-sama5d2_adc: fix sama7g5 realbits value
The number of valid bits in SAMA7G5 ADC channel data register are 16. Hence changing the realbits value to 16 Fixes: 840bf6c ("iio: adc: at91-sama5d2_adc: add support for sama7g5 device") Signed-off-by: Nayab Sayed <[email protected]> Link: https://patch.msgid.link/20250115-fix-sama7g5-adc-realbits-v2-1-58a6e4087584@microchip.com Cc: <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]>
1 parent 34d9380 commit aa5119c

File tree

1 file changed

+40
-28
lines changed

1 file changed

+40
-28
lines changed

drivers/iio/adc/at91-sama5d2_adc.c

Lines changed: 40 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -329,15 +329,15 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
329329
#define AT91_HWFIFO_MAX_SIZE_STR "128"
330330
#define AT91_HWFIFO_MAX_SIZE 128
331331

332-
#define AT91_SAMA5D2_CHAN_SINGLE(index, num, addr) \
332+
#define AT91_SAMA_CHAN_SINGLE(index, num, addr, rbits) \
333333
{ \
334334
.type = IIO_VOLTAGE, \
335335
.channel = num, \
336336
.address = addr, \
337337
.scan_index = index, \
338338
.scan_type = { \
339339
.sign = 'u', \
340-
.realbits = 14, \
340+
.realbits = rbits, \
341341
.storagebits = 16, \
342342
}, \
343343
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
@@ -350,7 +350,13 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
350350
.indexed = 1, \
351351
}
352352

353-
#define AT91_SAMA5D2_CHAN_DIFF(index, num, num2, addr) \
353+
#define AT91_SAMA5D2_CHAN_SINGLE(index, num, addr) \
354+
AT91_SAMA_CHAN_SINGLE(index, num, addr, 14)
355+
356+
#define AT91_SAMA7G5_CHAN_SINGLE(index, num, addr) \
357+
AT91_SAMA_CHAN_SINGLE(index, num, addr, 16)
358+
359+
#define AT91_SAMA_CHAN_DIFF(index, num, num2, addr, rbits) \
354360
{ \
355361
.type = IIO_VOLTAGE, \
356362
.differential = 1, \
@@ -360,7 +366,7 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
360366
.scan_index = index, \
361367
.scan_type = { \
362368
.sign = 's', \
363-
.realbits = 14, \
369+
.realbits = rbits, \
364370
.storagebits = 16, \
365371
}, \
366372
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
@@ -373,6 +379,12 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
373379
.indexed = 1, \
374380
}
375381

382+
#define AT91_SAMA5D2_CHAN_DIFF(index, num, num2, addr) \
383+
AT91_SAMA_CHAN_DIFF(index, num, num2, addr, 14)
384+
385+
#define AT91_SAMA7G5_CHAN_DIFF(index, num, num2, addr) \
386+
AT91_SAMA_CHAN_DIFF(index, num, num2, addr, 16)
387+
376388
#define AT91_SAMA5D2_CHAN_TOUCH(num, name, mod) \
377389
{ \
378390
.type = IIO_POSITIONRELATIVE, \
@@ -666,30 +678,30 @@ static const struct iio_chan_spec at91_sama5d2_adc_channels[] = {
666678
};
667679

668680
static const struct iio_chan_spec at91_sama7g5_adc_channels[] = {
669-
AT91_SAMA5D2_CHAN_SINGLE(0, 0, 0x60),
670-
AT91_SAMA5D2_CHAN_SINGLE(1, 1, 0x64),
671-
AT91_SAMA5D2_CHAN_SINGLE(2, 2, 0x68),
672-
AT91_SAMA5D2_CHAN_SINGLE(3, 3, 0x6c),
673-
AT91_SAMA5D2_CHAN_SINGLE(4, 4, 0x70),
674-
AT91_SAMA5D2_CHAN_SINGLE(5, 5, 0x74),
675-
AT91_SAMA5D2_CHAN_SINGLE(6, 6, 0x78),
676-
AT91_SAMA5D2_CHAN_SINGLE(7, 7, 0x7c),
677-
AT91_SAMA5D2_CHAN_SINGLE(8, 8, 0x80),
678-
AT91_SAMA5D2_CHAN_SINGLE(9, 9, 0x84),
679-
AT91_SAMA5D2_CHAN_SINGLE(10, 10, 0x88),
680-
AT91_SAMA5D2_CHAN_SINGLE(11, 11, 0x8c),
681-
AT91_SAMA5D2_CHAN_SINGLE(12, 12, 0x90),
682-
AT91_SAMA5D2_CHAN_SINGLE(13, 13, 0x94),
683-
AT91_SAMA5D2_CHAN_SINGLE(14, 14, 0x98),
684-
AT91_SAMA5D2_CHAN_SINGLE(15, 15, 0x9c),
685-
AT91_SAMA5D2_CHAN_DIFF(16, 0, 1, 0x60),
686-
AT91_SAMA5D2_CHAN_DIFF(17, 2, 3, 0x68),
687-
AT91_SAMA5D2_CHAN_DIFF(18, 4, 5, 0x70),
688-
AT91_SAMA5D2_CHAN_DIFF(19, 6, 7, 0x78),
689-
AT91_SAMA5D2_CHAN_DIFF(20, 8, 9, 0x80),
690-
AT91_SAMA5D2_CHAN_DIFF(21, 10, 11, 0x88),
691-
AT91_SAMA5D2_CHAN_DIFF(22, 12, 13, 0x90),
692-
AT91_SAMA5D2_CHAN_DIFF(23, 14, 15, 0x98),
681+
AT91_SAMA7G5_CHAN_SINGLE(0, 0, 0x60),
682+
AT91_SAMA7G5_CHAN_SINGLE(1, 1, 0x64),
683+
AT91_SAMA7G5_CHAN_SINGLE(2, 2, 0x68),
684+
AT91_SAMA7G5_CHAN_SINGLE(3, 3, 0x6c),
685+
AT91_SAMA7G5_CHAN_SINGLE(4, 4, 0x70),
686+
AT91_SAMA7G5_CHAN_SINGLE(5, 5, 0x74),
687+
AT91_SAMA7G5_CHAN_SINGLE(6, 6, 0x78),
688+
AT91_SAMA7G5_CHAN_SINGLE(7, 7, 0x7c),
689+
AT91_SAMA7G5_CHAN_SINGLE(8, 8, 0x80),
690+
AT91_SAMA7G5_CHAN_SINGLE(9, 9, 0x84),
691+
AT91_SAMA7G5_CHAN_SINGLE(10, 10, 0x88),
692+
AT91_SAMA7G5_CHAN_SINGLE(11, 11, 0x8c),
693+
AT91_SAMA7G5_CHAN_SINGLE(12, 12, 0x90),
694+
AT91_SAMA7G5_CHAN_SINGLE(13, 13, 0x94),
695+
AT91_SAMA7G5_CHAN_SINGLE(14, 14, 0x98),
696+
AT91_SAMA7G5_CHAN_SINGLE(15, 15, 0x9c),
697+
AT91_SAMA7G5_CHAN_DIFF(16, 0, 1, 0x60),
698+
AT91_SAMA7G5_CHAN_DIFF(17, 2, 3, 0x68),
699+
AT91_SAMA7G5_CHAN_DIFF(18, 4, 5, 0x70),
700+
AT91_SAMA7G5_CHAN_DIFF(19, 6, 7, 0x78),
701+
AT91_SAMA7G5_CHAN_DIFF(20, 8, 9, 0x80),
702+
AT91_SAMA7G5_CHAN_DIFF(21, 10, 11, 0x88),
703+
AT91_SAMA7G5_CHAN_DIFF(22, 12, 13, 0x90),
704+
AT91_SAMA7G5_CHAN_DIFF(23, 14, 15, 0x98),
693705
IIO_CHAN_SOFT_TIMESTAMP(24),
694706
AT91_SAMA5D2_CHAN_TEMP(AT91_SAMA7G5_ADC_TEMP_CHANNEL, "temp", 0xdc),
695707
};

0 commit comments

Comments
 (0)