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PCI: dwc: Consolidate args of dw_pcie_prog_outbound_atu() into a structure
This is a preparation before adding the Msg-type outbound iATU mapping. The respective update will require two more arguments added to __dw_pcie_prog_outbound_atu(). That will make the already complicated function prototype even more hard to comprehend accepting _eight_ arguments. To prevent that and keep the code more-or-less readable, move all the outbound iATU-related arguments to a new config structure: struct dw_pcie_ob_atu_cfg, and pass a pointer to dw_pcie_prog_outbound_atu(). The structure should be locally defined and populated with the outbound iATU settings implied by the caller context. As a result of this change there is no longer need in having the two distinctive methods for the Host and Endpoint outbound iATU setups since the code can directly call the dw_pcie_prog_outbound_atu() method with the config structure populated, so drop dw_pcie_prog_ep_outbound_atu(). [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Frank Li <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
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4 files changed

+77
-60
lines changed

‎drivers/pci/controller/dwc/pcie-designware-ep.c

Lines changed: 13 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -185,9 +185,8 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type,
185185
return 0;
186186
}
187187

188-
static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, u8 func_no,
189-
phys_addr_t phys_addr,
190-
u64 pci_addr, size_t size)
188+
static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep,
189+
struct dw_pcie_ob_atu_cfg *atu)
191190
{
192191
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
193192
u32 free_win;
@@ -199,13 +198,13 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, u8 func_no,
199198
return -EINVAL;
200199
}
201200

202-
ret = dw_pcie_prog_ep_outbound_atu(pci, func_no, free_win, PCIE_ATU_TYPE_MEM,
203-
phys_addr, pci_addr, size);
201+
atu->index = free_win;
202+
ret = dw_pcie_prog_outbound_atu(pci, atu);
204203
if (ret)
205204
return ret;
206205

207206
set_bit(free_win, ep->ob_window_map);
208-
ep->outbound_addr[free_win] = phys_addr;
207+
ep->outbound_addr[free_win] = atu->cpu_addr;
209208

210209
return 0;
211210
}
@@ -308,8 +307,14 @@ static int dw_pcie_ep_map_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
308307
int ret;
309308
struct dw_pcie_ep *ep = epc_get_drvdata(epc);
310309
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
311-
312-
ret = dw_pcie_ep_outbound_atu(ep, func_no, addr, pci_addr, size);
310+
struct dw_pcie_ob_atu_cfg atu = { 0 };
311+
312+
atu.func_no = func_no;
313+
atu.type = PCIE_ATU_TYPE_MEM;
314+
atu.cpu_addr = addr;
315+
atu.pci_addr = pci_addr;
316+
atu.size = size;
317+
ret = dw_pcie_ep_outbound_atu(ep, &atu);
313318
if (ret) {
314319
dev_err(pci->dev, "Failed to enable address\n");
315320
return ret;

‎drivers/pci/controller/dwc/pcie-designware-host.c

Lines changed: 36 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -554,6 +554,7 @@ static void __iomem *dw_pcie_other_conf_map_bus(struct pci_bus *bus,
554554
{
555555
struct dw_pcie_rp *pp = bus->sysdata;
556556
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
557+
struct dw_pcie_ob_atu_cfg atu = { 0 };
557558
int type, ret;
558559
u32 busdev;
559560

@@ -576,8 +577,12 @@ static void __iomem *dw_pcie_other_conf_map_bus(struct pci_bus *bus,
576577
else
577578
type = PCIE_ATU_TYPE_CFG1;
578579

579-
ret = dw_pcie_prog_outbound_atu(pci, 0, type, pp->cfg0_base, busdev,
580-
pp->cfg0_size);
580+
atu.type = type;
581+
atu.cpu_addr = pp->cfg0_base;
582+
atu.pci_addr = busdev;
583+
atu.size = pp->cfg0_size;
584+
585+
ret = dw_pcie_prog_outbound_atu(pci, &atu);
581586
if (ret)
582587
return NULL;
583588

@@ -589,16 +594,20 @@ static int dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn,
589594
{
590595
struct dw_pcie_rp *pp = bus->sysdata;
591596
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
597+
struct dw_pcie_ob_atu_cfg atu = { 0 };
592598
int ret;
593599

594600
ret = pci_generic_config_read(bus, devfn, where, size, val);
595601
if (ret != PCIBIOS_SUCCESSFUL)
596602
return ret;
597603

598604
if (pp->cfg0_io_shared) {
599-
ret = dw_pcie_prog_outbound_atu(pci, 0, PCIE_ATU_TYPE_IO,
600-
pp->io_base, pp->io_bus_addr,
601-
pp->io_size);
605+
atu.type = PCIE_ATU_TYPE_IO;
606+
atu.cpu_addr = pp->io_base;
607+
atu.pci_addr = pp->io_bus_addr;
608+
atu.size = pp->io_size;
609+
610+
ret = dw_pcie_prog_outbound_atu(pci, &atu);
602611
if (ret)
603612
return PCIBIOS_SET_FAILED;
604613
}
@@ -611,16 +620,20 @@ static int dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn,
611620
{
612621
struct dw_pcie_rp *pp = bus->sysdata;
613622
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
623+
struct dw_pcie_ob_atu_cfg atu = { 0 };
614624
int ret;
615625

616626
ret = pci_generic_config_write(bus, devfn, where, size, val);
617627
if (ret != PCIBIOS_SUCCESSFUL)
618628
return ret;
619629

620630
if (pp->cfg0_io_shared) {
621-
ret = dw_pcie_prog_outbound_atu(pci, 0, PCIE_ATU_TYPE_IO,
622-
pp->io_base, pp->io_bus_addr,
623-
pp->io_size);
631+
atu.type = PCIE_ATU_TYPE_IO;
632+
atu.cpu_addr = pp->io_base;
633+
atu.pci_addr = pp->io_bus_addr;
634+
atu.size = pp->io_size;
635+
636+
ret = dw_pcie_prog_outbound_atu(pci, &atu);
624637
if (ret)
625638
return PCIBIOS_SET_FAILED;
626639
}
@@ -655,6 +668,7 @@ static struct pci_ops dw_pcie_ops = {
655668
static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
656669
{
657670
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
671+
struct dw_pcie_ob_atu_cfg atu = { 0 };
658672
struct resource_entry *entry;
659673
int i, ret;
660674

@@ -682,10 +696,13 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
682696
if (pci->num_ob_windows <= ++i)
683697
break;
684698

685-
ret = dw_pcie_prog_outbound_atu(pci, i, PCIE_ATU_TYPE_MEM,
686-
entry->res->start,
687-
entry->res->start - entry->offset,
688-
resource_size(entry->res));
699+
atu.index = i;
700+
atu.type = PCIE_ATU_TYPE_MEM;
701+
atu.cpu_addr = entry->res->start;
702+
atu.pci_addr = entry->res->start - entry->offset;
703+
atu.size = resource_size(entry->res);
704+
705+
ret = dw_pcie_prog_outbound_atu(pci, &atu);
689706
if (ret) {
690707
dev_err(pci->dev, "Failed to set MEM range %pr\n",
691708
entry->res);
@@ -695,10 +712,13 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
695712

696713
if (pp->io_size) {
697714
if (pci->num_ob_windows > ++i) {
698-
ret = dw_pcie_prog_outbound_atu(pci, i, PCIE_ATU_TYPE_IO,
699-
pp->io_base,
700-
pp->io_bus_addr,
701-
pp->io_size);
715+
atu.index = i;
716+
atu.type = PCIE_ATU_TYPE_IO;
717+
atu.cpu_addr = pp->io_base;
718+
atu.pci_addr = pp->io_bus_addr;
719+
atu.size = pp->io_size;
720+
721+
ret = dw_pcie_prog_outbound_atu(pci, &atu);
702722
if (ret) {
703723
dev_err(pci->dev, "Failed to set IO range %pr\n",
704724
entry->res);

‎drivers/pci/controller/dwc/pcie-designware.c

Lines changed: 17 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -465,56 +465,56 @@ static inline u32 dw_pcie_enable_ecrc(u32 val)
465465
return val | PCIE_ATU_TD;
466466
}
467467

468-
static int __dw_pcie_prog_outbound_atu(struct dw_pcie *pci, u8 func_no,
469-
int index, int type, u64 cpu_addr,
470-
u64 pci_addr, u64 size)
468+
int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
469+
const struct dw_pcie_ob_atu_cfg *atu)
471470
{
471+
u64 cpu_addr = atu->cpu_addr;
472472
u32 retries, val;
473473
u64 limit_addr;
474474

475475
if (pci->ops && pci->ops->cpu_addr_fixup)
476476
cpu_addr = pci->ops->cpu_addr_fixup(pci, cpu_addr);
477477

478-
limit_addr = cpu_addr + size - 1;
478+
limit_addr = cpu_addr + atu->size - 1;
479479

480480
if ((limit_addr & ~pci->region_limit) != (cpu_addr & ~pci->region_limit) ||
481481
!IS_ALIGNED(cpu_addr, pci->region_align) ||
482-
!IS_ALIGNED(pci_addr, pci->region_align) || !size) {
482+
!IS_ALIGNED(atu->pci_addr, pci->region_align) || !atu->size) {
483483
return -EINVAL;
484484
}
485485

486-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_LOWER_BASE,
486+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LOWER_BASE,
487487
lower_32_bits(cpu_addr));
488-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_UPPER_BASE,
488+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_BASE,
489489
upper_32_bits(cpu_addr));
490490

491-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_LIMIT,
491+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LIMIT,
492492
lower_32_bits(limit_addr));
493493
if (dw_pcie_ver_is_ge(pci, 460A))
494-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_UPPER_LIMIT,
494+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_LIMIT,
495495
upper_32_bits(limit_addr));
496496

497-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_LOWER_TARGET,
498-
lower_32_bits(pci_addr));
499-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_UPPER_TARGET,
500-
upper_32_bits(pci_addr));
497+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LOWER_TARGET,
498+
lower_32_bits(atu->pci_addr));
499+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET,
500+
upper_32_bits(atu->pci_addr));
501501

502-
val = type | PCIE_ATU_FUNC_NUM(func_no);
502+
val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no);
503503
if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) &&
504504
dw_pcie_ver_is_ge(pci, 460A))
505505
val |= PCIE_ATU_INCREASE_REGION_SIZE;
506506
if (dw_pcie_ver_is(pci, 490A))
507507
val = dw_pcie_enable_ecrc(val);
508-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_REGION_CTRL1, val);
508+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val);
509509

510-
dw_pcie_writel_atu_ob(pci, index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE);
510+
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE);
511511

512512
/*
513513
* Make sure ATU enable takes effect before any subsequent config
514514
* and I/O accesses.
515515
*/
516516
for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) {
517-
val = dw_pcie_readl_atu_ob(pci, index, PCIE_ATU_REGION_CTRL2);
517+
val = dw_pcie_readl_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2);
518518
if (val & PCIE_ATU_ENABLE)
519519
return 0;
520520

@@ -526,21 +526,6 @@ static int __dw_pcie_prog_outbound_atu(struct dw_pcie *pci, u8 func_no,
526526
return -ETIMEDOUT;
527527
}
528528

529-
int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
530-
u64 cpu_addr, u64 pci_addr, u64 size)
531-
{
532-
return __dw_pcie_prog_outbound_atu(pci, 0, index, type,
533-
cpu_addr, pci_addr, size);
534-
}
535-
536-
int dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
537-
int type, u64 cpu_addr, u64 pci_addr,
538-
u64 size)
539-
{
540-
return __dw_pcie_prog_outbound_atu(pci, func_no, index, type,
541-
cpu_addr, pci_addr, size);
542-
}
543-
544529
static inline u32 dw_pcie_readl_atu_ib(struct dw_pcie *pci, u32 index, u32 reg)
545530
{
546531
return dw_pcie_readl_atu(pci, PCIE_ATU_REGION_DIR_IB, index, reg);

‎drivers/pci/controller/dwc/pcie-designware.h

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -298,6 +298,15 @@ enum dw_pcie_ltssm {
298298
DW_PCIE_LTSSM_UNKNOWN = 0xFFFFFFFF,
299299
};
300300

301+
struct dw_pcie_ob_atu_cfg {
302+
int index;
303+
int type;
304+
u8 func_no;
305+
u64 cpu_addr;
306+
u64 pci_addr;
307+
u64 size;
308+
};
309+
301310
struct dw_pcie_host_ops {
302311
int (*init)(struct dw_pcie_rp *pp);
303312
void (*deinit)(struct dw_pcie_rp *pp);
@@ -432,10 +441,8 @@ void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val);
432441
int dw_pcie_link_up(struct dw_pcie *pci);
433442
void dw_pcie_upconfig_setup(struct dw_pcie *pci);
434443
int dw_pcie_wait_for_link(struct dw_pcie *pci);
435-
int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
436-
u64 cpu_addr, u64 pci_addr, u64 size);
437-
int dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
438-
int type, u64 cpu_addr, u64 pci_addr, u64 size);
444+
int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
445+
const struct dw_pcie_ob_atu_cfg *atu);
439446
int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type,
440447
u64 cpu_addr, u64 pci_addr, u64 size);
441448
int dw_pcie_prog_ep_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,

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