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hegdevasantjoergroedel
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iommu/amd: Initial support for AMD IOMMU v2 page table
Introduce IO page table framework support for AMD IOMMU v2 page table. This patch implements 4 level page table within iommu amd driver and supports 4K/2M/1G page sizes. Signed-off-by: Vasant Hegde <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/amd/Makefile

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@@ -1,4 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_AMD_IOMMU) += iommu.o init.o quirks.o io_pgtable.o
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obj-$(CONFIG_AMD_IOMMU) += iommu.o init.o quirks.o io_pgtable.o io_pgtable_v2.o
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obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += debugfs.o
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obj-$(CONFIG_AMD_IOMMU_V2) += iommu_v2.o

drivers/iommu/amd/amd_iommu_types.h

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* 512GB Pages are not supported due to a hardware bug
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*/
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#define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38))
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/* 4K, 2MB, 1G page sizes are supported */
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#define AMD_IOMMU_PGSIZES_V2 (PAGE_SIZE | (1ULL << 21) | (1ULL << 30))
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/* Bit value definition for dte irq remapping fields*/
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#define DTE_IRQ_PHYS_ADDR_MASK (((1ULL << 45)-1) << 6)
@@ -526,7 +528,8 @@ struct amd_io_pgtable {
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struct io_pgtable iop;
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int mode;
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u64 *root;
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atomic64_t pt_root; /* pgtable root and pgtable mode */
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atomic64_t pt_root; /* pgtable root and pgtable mode */
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u64 *pgd; /* v2 pgtable pgd pointer */
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};
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/*

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