@@ -1436,7 +1436,9 @@ static int smu_v13_0_irq_process(struct amdgpu_device *adev,
1436
1436
case 0x8 :
1437
1437
high = smu -> thermal_range .software_shutdown_temp +
1438
1438
smu -> thermal_range .software_shutdown_temp_offset ;
1439
- high = min (SMU_THERMAL_MAXIMUM_ALERT_TEMP , high );
1439
+ high = min_t (typeof (high ),
1440
+ SMU_THERMAL_MAXIMUM_ALERT_TEMP ,
1441
+ high );
1440
1442
dev_emerg (adev -> dev , "Reduce soft CTF limit to %d (by an offset %d)\n" ,
1441
1443
high ,
1442
1444
smu -> thermal_range .software_shutdown_temp_offset );
@@ -1449,8 +1451,9 @@ static int smu_v13_0_irq_process(struct amdgpu_device *adev,
1449
1451
WREG32_SOC15 (THM , 0 , regTHM_THERMAL_INT_CTRL , data );
1450
1452
break ;
1451
1453
case 0x9 :
1452
- high = min (SMU_THERMAL_MAXIMUM_ALERT_TEMP ,
1453
- smu -> thermal_range .software_shutdown_temp );
1454
+ high = min_t (typeof (high ),
1455
+ SMU_THERMAL_MAXIMUM_ALERT_TEMP ,
1456
+ smu -> thermal_range .software_shutdown_temp );
1454
1457
dev_emerg (adev -> dev , "Recover soft CTF limit to %d\n" , high );
1455
1458
1456
1459
data = RREG32_SOC15 (THM , 0 , regTHM_THERMAL_INT_CTRL );
0 commit comments