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idoschdavem330
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mlxsw: spectrum: Use dedicated policer for VRRP packets
Currently, VRRP packets and packets that hit exceptions during routing (e.g., MTU error) are policed using the same policer towards the CPU. This means, for example, that misconfiguration of the MTU on a routed interface can prevent VRRP packets from reaching the CPU, which in turn can cause the VRRP daemon to assume it is the Master router. Fix this by using a dedicated policer for VRRP packets. Fixes: 11566d3 ("mlxsw: spectrum: Add VRRP traps") Signed-off-by: Ido Schimmel <[email protected]> Reported-by: Alex Veber <[email protected]> Tested-by: Alex Veber <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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drivers/net/ethernet/mellanox/mlxsw/reg.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5472,6 +5472,7 @@ enum mlxsw_reg_htgt_trap_group {
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MLXSW_REG_HTGT_TRAP_GROUP_SP_LBERROR,
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MLXSW_REG_HTGT_TRAP_GROUP_SP_PTP0,
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MLXSW_REG_HTGT_TRAP_GROUP_SP_PTP1,
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MLXSW_REG_HTGT_TRAP_GROUP_SP_VRRP,
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__MLXSW_REG_HTGT_TRAP_GROUP_MAX,
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MLXSW_REG_HTGT_TRAP_GROUP_MAX = __MLXSW_REG_HTGT_TRAP_GROUP_MAX - 1

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4542,8 +4542,8 @@ static const struct mlxsw_listener mlxsw_sp_listener[] = {
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MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV6, TRAP_TO_CPU, ROUTER_EXP, false),
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MLXSW_SP_RXL_MARK(IPIP_DECAP_ERROR, TRAP_TO_CPU, ROUTER_EXP, false),
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MLXSW_SP_RXL_MARK(DECAP_ECN0, TRAP_TO_CPU, ROUTER_EXP, false),
4545-
MLXSW_SP_RXL_MARK(IPV4_VRRP, TRAP_TO_CPU, ROUTER_EXP, false),
4546-
MLXSW_SP_RXL_MARK(IPV6_VRRP, TRAP_TO_CPU, ROUTER_EXP, false),
4545+
MLXSW_SP_RXL_MARK(IPV4_VRRP, TRAP_TO_CPU, VRRP, false),
4546+
MLXSW_SP_RXL_MARK(IPV6_VRRP, TRAP_TO_CPU, VRRP, false),
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/* PKT Sample trap */
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MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
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false, SP_IP2ME, DISCARD),
@@ -4626,6 +4626,10 @@ static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
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rate = 19 * 1024;
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burst_size = 12;
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break;
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case MLXSW_REG_HTGT_TRAP_GROUP_SP_VRRP:
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rate = 360;
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burst_size = 7;
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break;
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default:
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continue;
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}
@@ -4665,6 +4669,7 @@ static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
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case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
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case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM:
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case MLXSW_REG_HTGT_TRAP_GROUP_SP_PTP0:
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case MLXSW_REG_HTGT_TRAP_GROUP_SP_VRRP:
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priority = 5;
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tc = 5;
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break;

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