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drm/i915: Fix cs timestamp frequency for ctg/elk/ilk
On ilk the UDW of TIMESTAMP increments every 1000 ns, LDW is mbz. In order to represent that we'd need 52 bits, but we only have 32 bits. Even worse most things want to only deal with 32 bits of timestamp. So let's just set up the timestamp frequency as if we only had the UDW. On ctg/elk 63:20 of TIMESTAMP increments every 1/4 ns, 19:0 are mbz. To make life simpler let's ignore the LDW and set up timestamp frequency based on the UDW only (increments every 1024 ns). v2: Rebase Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
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drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c

Lines changed: 26 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -107,7 +107,7 @@ static u32 gen9_read_clock_frequency(struct intel_uncore *uncore)
107107
return freq;
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}
109109

110-
static u32 gen5_read_clock_frequency(struct intel_uncore *uncore)
110+
static u32 gen6_read_clock_frequency(struct intel_uncore *uncore)
111111
{
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/*
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* PRMs say:
@@ -119,6 +119,26 @@ static u32 gen5_read_clock_frequency(struct intel_uncore *uncore)
119119
return 12500000;
120120
}
121121

122+
static u32 gen5_read_clock_frequency(struct intel_uncore *uncore)
123+
{
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/*
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* 63:32 increments every 1000 ns
126+
* 31:0 mbz
127+
*/
128+
return 1000000000 / 1000;
129+
}
130+
131+
static u32 g4x_read_clock_frequency(struct intel_uncore *uncore)
132+
{
133+
/*
134+
* 63:20 increments every 1/4 ns
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* 19:0 mbz
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*
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* -> 63:32 increments every 1024 ns
138+
*/
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return 1000000000 / 1024;
140+
}
141+
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static u32 gen2_read_clock_frequency(struct intel_uncore *uncore)
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{
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/*
@@ -137,8 +157,12 @@ static u32 read_clock_frequency(struct intel_uncore *uncore)
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return gen11_read_clock_frequency(uncore);
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else if (GRAPHICS_VER(uncore->i915) >= 9)
139159
return gen9_read_clock_frequency(uncore);
140-
else if (GRAPHICS_VER(uncore->i915) >= 5)
160+
else if (GRAPHICS_VER(uncore->i915) >= 6)
161+
return gen6_read_clock_frequency(uncore);
162+
else if (GRAPHICS_VER(uncore->i915) == 5)
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return gen5_read_clock_frequency(uncore);
164+
else if (IS_G4X(uncore->i915))
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return g4x_read_clock_frequency(uncore);
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else
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return gen2_read_clock_frequency(uncore);
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}

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