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clk: meson: introduce symbol namespace for amlogic clocks
Symbols exported by the Amlogic clock modules are only meant to be used by Amlogic clock controller drivers. Using a dedicated symbols namespace make that clear and help clean the global namespace of symbols other modules do no need. Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jerome Brunet <[email protected]>
1 parent 4cb8347 commit adac147

25 files changed

+49
-25
lines changed

drivers/clk/meson/a1-peripherals.c

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Original file line numberDiff line numberDiff line change
@@ -2246,3 +2246,4 @@ MODULE_DESCRIPTION("Amlogic A1 Peripherals Clock Controller driver");
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MODULE_AUTHOR("Jian Hu <[email protected]>");
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MODULE_AUTHOR("Dmitry Rokosov <[email protected]>");
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MODULE_LICENSE("GPL");
2249+
MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/a1-pll.c

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Original file line numberDiff line numberDiff line change
@@ -360,3 +360,4 @@ MODULE_DESCRIPTION("Amlogic S4 PLL Clock Controller driver");
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MODULE_AUTHOR("Jian Hu <[email protected]>");
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MODULE_AUTHOR("Dmitry Rokosov <[email protected]>");
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MODULE_LICENSE("GPL");
363+
MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/axg-aoclk.c

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Original file line numberDiff line numberDiff line change
@@ -342,3 +342,4 @@ module_platform_driver(axg_aoclkc_driver);
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MODULE_DESCRIPTION("Amlogic AXG Always-ON Clock Controller driver");
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MODULE_LICENSE("GPL");
345+
MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/axg-audio.c

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Original file line numberDiff line numberDiff line change
@@ -1912,3 +1912,4 @@ module_platform_driver(axg_audio_driver);
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MODULE_DESCRIPTION("Amlogic AXG/G12A/SM1 Audio Clock driver");
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MODULE_AUTHOR("Jerome Brunet <[email protected]>");
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MODULE_LICENSE("GPL");
1915+
MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/axg.c

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Original file line numberDiff line numberDiff line change
@@ -2187,3 +2187,4 @@ module_platform_driver(axg_driver);
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MODULE_DESCRIPTION("Amlogic AXG Main Clock Controller driver");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/c3-peripherals.c

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Original file line numberDiff line numberDiff line change
@@ -2364,3 +2364,4 @@ module_platform_driver(c3_peripherals_driver);
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MODULE_DESCRIPTION("Amlogic C3 Peripherals Clock Controller driver");
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MODULE_AUTHOR("Chuan Liu <[email protected]>");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/c3-pll.c

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Original file line numberDiff line numberDiff line change
@@ -745,3 +745,4 @@ module_platform_driver(c3_pll_driver);
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MODULE_DESCRIPTION("Amlogic C3 PLL Clock Controller driver");
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MODULE_AUTHOR("Chuan Liu <[email protected]>");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/clk-cpu-dyndiv.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,8 +65,9 @@ const struct clk_ops meson_clk_cpu_dyndiv_ops = {
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.determine_rate = meson_clk_cpu_dyndiv_determine_rate,
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.set_rate = meson_clk_cpu_dyndiv_set_rate,
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};
68-
EXPORT_SYMBOL_GPL(meson_clk_cpu_dyndiv_ops);
68+
EXPORT_SYMBOL_NS_GPL(meson_clk_cpu_dyndiv_ops, CLK_MESON);
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MODULE_DESCRIPTION("Amlogic CPU Dynamic Clock divider");
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MODULE_AUTHOR("Neil Armstrong <[email protected]>");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/clk-dualdiv.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -130,14 +130,15 @@ const struct clk_ops meson_clk_dualdiv_ops = {
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.determine_rate = meson_clk_dualdiv_determine_rate,
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.set_rate = meson_clk_dualdiv_set_rate,
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};
133-
EXPORT_SYMBOL_GPL(meson_clk_dualdiv_ops);
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EXPORT_SYMBOL_NS_GPL(meson_clk_dualdiv_ops, CLK_MESON);
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const struct clk_ops meson_clk_dualdiv_ro_ops = {
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.recalc_rate = meson_clk_dualdiv_recalc_rate,
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};
138-
EXPORT_SYMBOL_GPL(meson_clk_dualdiv_ro_ops);
138+
EXPORT_SYMBOL_NS_GPL(meson_clk_dualdiv_ro_ops, CLK_MESON);
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MODULE_DESCRIPTION("Amlogic dual divider driver");
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MODULE_AUTHOR("Neil Armstrong <[email protected]>");
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MODULE_AUTHOR("Jerome Brunet <[email protected]>");
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MODULE_LICENSE("GPL");
144+
MODULE_IMPORT_NS(CLK_MESON);

drivers/clk/meson/clk-mpll.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -165,16 +165,17 @@ const struct clk_ops meson_clk_mpll_ro_ops = {
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.recalc_rate = mpll_recalc_rate,
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.determine_rate = mpll_determine_rate,
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};
168-
EXPORT_SYMBOL_GPL(meson_clk_mpll_ro_ops);
168+
EXPORT_SYMBOL_NS_GPL(meson_clk_mpll_ro_ops, CLK_MESON);
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170170
const struct clk_ops meson_clk_mpll_ops = {
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.recalc_rate = mpll_recalc_rate,
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.determine_rate = mpll_determine_rate,
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.set_rate = mpll_set_rate,
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.init = mpll_init,
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};
176-
EXPORT_SYMBOL_GPL(meson_clk_mpll_ops);
176+
EXPORT_SYMBOL_NS_GPL(meson_clk_mpll_ops, CLK_MESON);
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MODULE_DESCRIPTION("Amlogic MPLL driver");
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MODULE_AUTHOR("Michael Turquette <[email protected]>");
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MODULE_LICENSE("GPL");
181+
MODULE_IMPORT_NS(CLK_MESON);

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