Skip to content

Commit ae460fd

Browse files
willdeacondlezcano
authored andcommitted
clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64
All arm64 CPUs feature an architected timer, which offers a relatively low-latency interface to a per-cpu clocksource and timer. For the most part, using this interface is a no-brainer, with the exception of SoCs where it cannot be used to wake up from deep idle state (i.e. CLOCK_EVT_FEAT_C3STOP is set). On the contrary, the Exynos MCT is extremely slow to access yet can be used as a wakeup source. In preparation for using the Exynos MCT as a potential wakeup timer for the Arm architected timer, reduce its ratings so that the architected timer is preferred. This effectively reverts the decision made in 6282edb ("clocksource/drivers/exynos_mct: Increase priority over ARM arch timer") for arm64, as the reasoning for the original change was to work around a 32-bit SoC design. Cc: Marek Szyprowski <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Chanwoo Choi <[email protected]> Cc: Thomas Gleixner <[email protected]> Signed-off-by: Will Deacon <[email protected]> Tested-by: Krzysztof Kozlowski <[email protected]> # exynos-5422 Signed-off-by: Daniel Lezcano <[email protected]> Link: https://lore.kernel.org/r/[email protected]
1 parent f80e214 commit ae460fd

File tree

1 file changed

+11
-2
lines changed

1 file changed

+11
-2
lines changed

drivers/clocksource/exynos_mct.c

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,15 @@
5151

5252
#define TICK_BASE_CNT 1
5353

54+
#ifdef CONFIG_ARM
55+
/* Use values higher than ARM arch timer. See 6282edb72bed. */
56+
#define MCT_CLKSOURCE_RATING 450
57+
#define MCT_CLKEVENTS_RATING 500
58+
#else
59+
#define MCT_CLKSOURCE_RATING 350
60+
#define MCT_CLKEVENTS_RATING 350
61+
#endif
62+
5463
enum {
5564
MCT_INT_SPI,
5665
MCT_INT_PPI
@@ -206,7 +215,7 @@ static void exynos4_frc_resume(struct clocksource *cs)
206215

207216
static struct clocksource mct_frc = {
208217
.name = "mct-frc",
209-
.rating = 450, /* use value higher than ARM arch timer */
218+
.rating = MCT_CLKSOURCE_RATING,
210219
.read = exynos4_frc_read,
211220
.mask = CLOCKSOURCE_MASK(32),
212221
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
@@ -457,7 +466,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu)
457466
evt->set_state_oneshot_stopped = set_state_shutdown;
458467
evt->tick_resume = set_state_shutdown;
459468
evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
460-
evt->rating = 500; /* use value higher than ARM arch timer */
469+
evt->rating = MCT_CLKEVENTS_RATING,
461470

462471
exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
463472

0 commit comments

Comments
 (0)