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Marc Zyngierwilldeacon
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arm64: Add handling of CNTVCTSS traps
Since CNTVCTSS obey the same control bits as CNTVCT, add the necessary decoding to the hook table. Note that there is no known user of this at the moment. Acked-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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arch/arm64/include/asm/esr.h

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@@ -227,6 +227,9 @@
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#define ESR_ELx_SYS64_ISS_SYS_CNTVCT (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 2, 14, 0) | \
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ESR_ELx_SYS64_ISS_DIR_READ)
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#define ESR_ELx_SYS64_ISS_SYS_CNTVCTSS (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 6, 14, 0) | \
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ESR_ELx_SYS64_ISS_DIR_READ)
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#define ESR_ELx_SYS64_ISS_SYS_CNTFRQ (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \
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ESR_ELx_SYS64_ISS_DIR_READ)
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@@ -317,6 +320,9 @@
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#define ESR_ELx_CP15_64_ISS_SYS_CNTVCT (ESR_ELx_CP15_64_ISS_SYS_VAL(1, 14) | \
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ESR_ELx_CP15_64_ISS_DIR_READ)
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#define ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS (ESR_ELx_CP15_64_ISS_SYS_VAL(9, 14) | \
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ESR_ELx_CP15_64_ISS_DIR_READ)
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#define ESR_ELx_CP15_32_ISS_SYS_CNTFRQ (ESR_ELx_CP15_32_ISS_SYS_VAL(0, 0, 14, 0) |\
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ESR_ELx_CP15_32_ISS_DIR_READ)
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arch/arm64/kernel/traps.c

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Original file line numberDiff line numberDiff line change
@@ -653,6 +653,12 @@ static const struct sys64_hook sys64_hooks[] = {
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.esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
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.handler = cntvct_read_handler,
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},
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{
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/* Trap read access to CNTVCTSS_EL0 */
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.esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
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.esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCTSS,
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.handler = cntvct_read_handler,
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},
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{
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/* Trap read access to CNTFRQ_EL0 */
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.esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
@@ -729,6 +735,11 @@ static const struct sys64_hook cp15_64_hooks[] = {
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.esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT,
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.handler = compat_cntvct_read_handler,
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},
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{
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.esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK,
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.esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS,
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.handler = compat_cntvct_read_handler,
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},
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{},
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};
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