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105 | 105 | };
|
106 | 106 | };
|
107 | 107 |
|
| 108 | + gpu_opp_table: opp-table-1 { |
| 109 | + compatible = "operating-points-v2"; |
| 110 | + |
| 111 | + opp-630000000 { |
| 112 | + opp-hz = /bits/ 64 <630000000>; |
| 113 | + opp-microvolt = <800000>; |
| 114 | + }; |
| 115 | + |
| 116 | + opp-315000000 { |
| 117 | + opp-hz = /bits/ 64 <315000000>; |
| 118 | + opp-microvolt = <800000>; |
| 119 | + }; |
| 120 | + |
| 121 | + opp-157500000 { |
| 122 | + opp-hz = /bits/ 64 <157500000>; |
| 123 | + opp-microvolt = <800000>; |
| 124 | + }; |
| 125 | + |
| 126 | + opp-78750000 { |
| 127 | + opp-hz = /bits/ 64 <78750000>; |
| 128 | + opp-microvolt = <800000>; |
| 129 | + }; |
| 130 | + |
| 131 | + opp-19687500 { |
| 132 | + opp-hz = /bits/ 64 <19687500>; |
| 133 | + opp-microvolt = <800000>; |
| 134 | + }; |
| 135 | + }; |
| 136 | + |
108 | 137 | psci {
|
109 | 138 | compatible = "arm,psci-1.0", "arm,psci-0.2";
|
110 | 139 | method = "smc";
|
|
491 | 520 | status = "disabled";
|
492 | 521 | };
|
493 | 522 |
|
| 523 | + gpu: gpu@14850000 { |
| 524 | + compatible = "renesas,r9a09g047-mali", |
| 525 | + "arm,mali-bifrost"; |
| 526 | + reg = <0x0 0x14850000 0x0 0x10000>; |
| 527 | + interrupts = <GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH>, |
| 528 | + <GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH>, |
| 529 | + <GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH>, |
| 530 | + <GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH>; |
| 531 | + interrupt-names = "job", "mmu", "gpu", "event"; |
| 532 | + clocks = <&cpg CPG_MOD 0xf0>, |
| 533 | + <&cpg CPG_MOD 0xf1>, |
| 534 | + <&cpg CPG_MOD 0xf2>; |
| 535 | + clock-names = "gpu", "bus", "bus_ace"; |
| 536 | + power-domains = <&cpg>; |
| 537 | + resets = <&cpg 0xdd>, <&cpg 0xde>, <&cpg 0xdf>; |
| 538 | + reset-names = "rst", "axi_rst", "ace_rst"; |
| 539 | + operating-points-v2 = <&gpu_opp_table>; |
| 540 | + status = "disabled"; |
| 541 | + }; |
| 542 | + |
494 | 543 | gic: interrupt-controller@14900000 {
|
495 | 544 | compatible = "arm,gic-v3";
|
496 | 545 | reg = <0x0 0x14900000 0 0x20000>,
|
|
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