@@ -1305,18 +1305,21 @@ static int mes_v12_0_sw_fini(void *handle)
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& adev -> mes .eop_gpu_addr [pipe ],
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NULL );
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amdgpu_ucode_release (& adev -> mes .fw [pipe ]);
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- }
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-
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- amdgpu_bo_free_kernel (& adev -> gfx .kiq [0 ].ring .mqd_obj ,
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- & adev -> gfx .kiq [0 ].ring .mqd_gpu_addr ,
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- & adev -> gfx .kiq [0 ].ring .mqd_ptr );
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- amdgpu_bo_free_kernel (& adev -> mes .ring [0 ].mqd_obj ,
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- & adev -> mes .ring [0 ].mqd_gpu_addr ,
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- & adev -> mes .ring [0 ].mqd_ptr );
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+ if (adev -> enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE ) {
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+ amdgpu_bo_free_kernel (& adev -> mes .ring [pipe ].mqd_obj ,
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+ & adev -> mes .ring [pipe ].mqd_gpu_addr ,
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+ & adev -> mes .ring [pipe ].mqd_ptr );
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+ amdgpu_ring_fini (& adev -> mes .ring [pipe ]);
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+ }
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+ }
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- amdgpu_ring_fini (& adev -> gfx .kiq [0 ].ring );
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- amdgpu_ring_fini (& adev -> mes .ring [0 ]);
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+ if (!adev -> enable_uni_mes ) {
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+ amdgpu_bo_free_kernel (& adev -> gfx .kiq [0 ].ring .mqd_obj ,
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+ & adev -> gfx .kiq [0 ].ring .mqd_gpu_addr ,
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+ & adev -> gfx .kiq [0 ].ring .mqd_ptr );
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+ amdgpu_ring_fini (& adev -> gfx .kiq [0 ].ring );
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+ }
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if (adev -> firmware .load_type == AMDGPU_FW_LOAD_DIRECT ) {
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mes_v12_0_free_ucode_buffers (adev , AMDGPU_MES_KIQ_PIPE );
@@ -1433,7 +1436,13 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev)
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static int mes_v12_0_kiq_hw_fini (struct amdgpu_device * adev )
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{
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if (adev -> mes .ring [0 ].sched .ready ) {
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- mes_v12_0_kiq_dequeue_sched (adev );
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+ if (adev -> enable_uni_mes )
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+ amdgpu_mes_unmap_legacy_queue (adev ,
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+ & adev -> mes .ring [AMDGPU_MES_SCHED_PIPE ],
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+ RESET_QUEUES , 0 , 0 );
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+ else
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+ mes_v12_0_kiq_dequeue_sched (adev );
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+
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adev -> mes .ring [0 ].sched .ready = false;
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}
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