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drm/i915: Drop WA 16015675438
With dynamic load-balancing disabled on the compute side, there's no reason left to enable WA 16015675438. Drop it from both PVC and DG2. Note that this can be done because now the driver always set a fixed partition of EUs during initialization via the ccs_mode configuration. The flag to GuC is still needed because of 18020744125, so update the comment accordingly. Cc: Rodrigo Vivi <[email protected]> Acked-by: Mateusz Jablonski <[email protected]> Acked-by: Michal Mrozek <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Lucas De Marchi <[email protected]>
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drivers/gpu/drm/i915/gt/intel_workarounds.c

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2928,14 +2928,10 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li
29282928
wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0, DISABLE_D8_D16_COASLESCE);
29292929
}
29302930

2931-
if (IS_PONTEVECCHIO(i915) || IS_DG2(i915)) {
2931+
if (IS_PONTEVECCHIO(i915) || IS_DG2(i915))
29322932
/* Wa_14015227452:dg2,pvc */
29332933
wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN4, XEHP_DIS_BBL_SYSPIPE);
29342934

2935-
/* Wa_16015675438:dg2,pvc */
2936-
wa_masked_en(wal, FF_SLICE_CS_CHICKEN2, GEN12_PERF_FIX_BALANCING_CFE_DISABLE);
2937-
}
2938-
29392935
if (IS_DG2(i915)) {
29402936
/*
29412937
* Wa_16011620976:dg2_g11

drivers/gpu/drm/i915/gt/uc/intel_guc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -320,7 +320,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
320320
if (IS_DG2_G11(gt->i915))
321321
flags |= GUC_WA_CONTEXT_ISOLATION;
322322

323-
/* Wa_16015675438 */
323+
/* Wa_18020744125 */
324324
if (!RCS_MASK(gt))
325325
flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;
326326

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