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RISC-V: Align the shadow stack
The standard RISC-V ABIs all require 16-byte stack alignment. We're only calling that one function on the shadow stack so I doubt it'd result in a real issue, but might as well keep this lined up. Fixes: 31da94c ("riscv: add VMAP_STACK overflow detection") Reviewed-by: Jisheng Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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arch/riscv/kernel/traps.c

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@@ -206,7 +206,7 @@ static DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)],
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* shadow stack, handled_ kernel_ stack_ overflow(in kernel/entry.S) is used
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* to get per-cpu overflow stack(get_overflow_stack).
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*/
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long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)];
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long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)] __aligned(16);
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asmlinkage unsigned long get_overflow_stack(void)
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{
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return (unsigned long)this_cpu_ptr(overflow_stack) +

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