@@ -88,11 +88,15 @@ struct geni_se {
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#define SE_GENI_M_IRQ_STATUS 0x610
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#define SE_GENI_M_IRQ_EN 0x614
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#define SE_GENI_M_IRQ_CLEAR 0x618
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+ #define SE_GENI_M_IRQ_EN_SET 0x61c
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+ #define SE_GENI_M_IRQ_EN_CLEAR 0x620
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#define SE_GENI_S_CMD0 0x630
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#define SE_GENI_S_CMD_CTRL_REG 0x634
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#define SE_GENI_S_IRQ_STATUS 0x640
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#define SE_GENI_S_IRQ_EN 0x644
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#define SE_GENI_S_IRQ_CLEAR 0x648
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+ #define SE_GENI_S_IRQ_EN_SET 0x64c
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+ #define SE_GENI_S_IRQ_EN_CLEAR 0x650
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#define SE_GENI_TX_FIFOn 0x700
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#define SE_GENI_RX_FIFOn 0x780
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#define SE_GENI_TX_FIFO_STATUS 0x800
@@ -101,6 +105,8 @@ struct geni_se {
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#define SE_GENI_RX_WATERMARK_REG 0x810
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#define SE_GENI_RX_RFR_WATERMARK_REG 0x814
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#define SE_GENI_IOS 0x908
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+ #define SE_GENI_M_GP_LENGTH 0x910
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+ #define SE_GENI_S_GP_LENGTH 0x914
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#define SE_DMA_TX_IRQ_STAT 0xc40
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#define SE_DMA_TX_IRQ_CLR 0xc44
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#define SE_DMA_TX_FSM_RST 0xc58
@@ -234,6 +240,9 @@ struct geni_se {
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#define IO2_DATA_IN BIT(1)
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#define RX_DATA_IN BIT(0)
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+ /* SE_GENI_M_GP_LENGTH and SE_GENI_S_GP_LENGTH fields */
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+ #define GP_LENGTH GENMASK(31, 0)
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+
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/* SE_DMA_TX_IRQ_STAT Register fields */
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#define TX_DMA_DONE BIT(0)
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#define TX_EOT BIT(1)
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