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Nicolas Saenz Juliennemripard
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drm/vc4: Fix HDMI mode validation
Current mode validation impedes setting up some video modes which should be supported otherwise. Namely 1920x1200@60Hz. Fix this by lowering the minimum HDMI state machine clock to pixel clock ratio allowed. Fixes: 32e823c ("drm/vc4: Reject HDMI modes with too high of clocks.") Reported-by: Stefan Wahren <[email protected]> Suggested-by: Dave Stevenson <[email protected]> Signed-off-by: Nicolas Saenz Julienne <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/vc4/vc4_hdmi.c

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -681,11 +681,23 @@ static enum drm_mode_status
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vc4_hdmi_encoder_mode_valid(struct drm_encoder *crtc,
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const struct drm_display_mode *mode)
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{
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/* HSM clock must be 108% of the pixel clock. Additionally,
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* the AXI clock needs to be at least 25% of pixel clock, but
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* HSM ends up being the limiting factor.
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/*
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* As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must
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* be faster than pixel clock, infinitesimally faster, tested in
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* simulation. Otherwise, exact value is unimportant for HDMI
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* operation." This conflicts with bcm2835's vc4 documentation, which
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* states HSM's clock has to be at least 108% of the pixel clock.
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*
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* Real life tests reveal that vc4's firmware statement holds up, and
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* users are able to use pixel clocks closer to HSM's, namely for
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* 1920x1200@60Hz. So it was decided to have leave a 1% margin between
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* both clocks. Which, for RPi0-3 implies a maximum pixel clock of
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* 162MHz.
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*
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* Additionally, the AXI clock needs to be at least 25% of
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* pixel clock, but HSM ends up being the limiting factor.
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*/
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if (mode->clock > HSM_CLOCK_FREQ / (1000 * 108 / 100))
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if (mode->clock > HSM_CLOCK_FREQ / (1000 * 101 / 100))
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return MODE_CLOCK_HIGH;
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return MODE_OK;

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