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Merge branches 'pm-devfreq' and 'pm-tools'
* pm-devfreq: PM / devfreq: tegra30: Separate configurations per-SoC generation PM / devfreq: tegra30: Support interconnect and OPPs from device-tree PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver PM / devfreq: exynos-bus: Add registration of interconnect child device dt-bindings: devfreq: Add documentation for the interconnect properties soc/tegra: fuse: Add stub for tegra_sku_info soc/tegra: fuse: Export tegra_read_ram_code() clk: tegra: Export Tegra20 EMC kernel symbols PM / devfreq: tegra30: Silence deferred probe error PM / devfreq: tegra20: Relax Kconfig dependency PM / devfreq: tegra20: Silence deferred probe error PM / devfreq: Remove redundant governor_name from struct devfreq PM / devfreq: Add governor attribute flag for specifc sysfs nodes PM / devfreq: Add governor feature flag PM / devfreq: Add tracepoint for frequency changes PM / devfreq: Unify frequency change to devfreq_update_target func trace: events: devfreq: Use fixed indentation size to improve readability * pm-tools: pm-graph v5.8 cpupower: Provide online and offline CPU information
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‎Documentation/ABI/testing/sysfs-class-devfreq

Lines changed: 32 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -37,20 +37,6 @@ Description:
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The /sys/class/devfreq/.../target_freq shows the next governor
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predicted target frequency of the corresponding devfreq object.
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40-
What: /sys/class/devfreq/.../polling_interval
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Date: September 2011
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Contact: MyungJoo Ham <[email protected]>
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Description:
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The /sys/class/devfreq/.../polling_interval shows and sets
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the requested polling interval of the corresponding devfreq
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object. The values are represented in ms. If the value is
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less than 1 jiffy, it is considered to be 0, which means
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no polling. This value is meaningless if the governor is
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not polling; thus. If the governor is not using
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devfreq-provided central polling
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(/sys/class/devfreq/.../central_polling is 0), this value
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may be useless.
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What: /sys/class/devfreq/.../trans_stat
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Date: October 2012
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Contact: MyungJoo Ham <[email protected]>
@@ -66,14 +52,6 @@ Description:
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echo 0 > /sys/class/devfreq/.../trans_stat
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What: /sys/class/devfreq/.../userspace/set_freq
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Date: September 2011
71-
Contact: MyungJoo Ham <[email protected]>
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Description:
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The /sys/class/devfreq/.../userspace/set_freq shows and
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sets the requested frequency for the devfreq object if
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userspace governor is in effect.
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What: /sys/class/devfreq/.../available_frequencies
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Date: October 2012
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Contact: Nishanth Menon <[email protected]>
@@ -110,6 +88,35 @@ Description:
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The max_freq overrides min_freq because max_freq may be
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used to throttle devices to avoid overheating.
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91+
What: /sys/class/devfreq/.../polling_interval
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Date: September 2011
93+
Contact: MyungJoo Ham <[email protected]>
94+
Description:
95+
The /sys/class/devfreq/.../polling_interval shows and sets
96+
the requested polling interval of the corresponding devfreq
97+
object. The values are represented in ms. If the value is
98+
less than 1 jiffy, it is considered to be 0, which means
99+
no polling. This value is meaningless if the governor is
100+
not polling; thus. If the governor is not using
101+
devfreq-provided central polling
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(/sys/class/devfreq/.../central_polling is 0), this value
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may be useless.
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A list of governors that support the node:
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- simple_ondmenad
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- tegra_actmon
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109+
What: /sys/class/devfreq/.../userspace/set_freq
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Date: September 2011
111+
Contact: MyungJoo Ham <[email protected]>
112+
Description:
113+
The /sys/class/devfreq/.../userspace/set_freq shows and
114+
sets the requested frequency for the devfreq object if
115+
userspace governor is in effect.
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A list of governors that support the node:
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- userspace
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What: /sys/class/devfreq/.../timer
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Date: July 2020
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Contact: Chanwoo Choi <[email protected]>
@@ -122,3 +129,6 @@ Description:
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echo deferrable > /sys/class/devfreq/.../timer
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echo delayed > /sys/class/devfreq/.../timer
132+
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A list of governors that support the node:
134+
- simple_ondemand

‎Documentation/devicetree/bindings/devfreq/exynos-bus.txt

Lines changed: 69 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,19 @@ Optional properties only for parent bus device:
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- exynos,saturation-ratio: the percentage value which is used to calibrate
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the performance count against total cycle count.
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54+
Optional properties for the interconnect functionality (QoS frequency
55+
constraints):
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- #interconnect-cells: should be 0.
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- interconnects: as documented in ../interconnect.txt, describes a path at the
58+
higher level interconnects used by this interconnect provider.
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If this interconnect provider is directly linked to a top level interconnect
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provider the property contains only one phandle. The provider extends
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the interconnect graph by linking its node to a node registered by provider
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pointed to by first phandle in the 'interconnects' property.
63+
64+
- samsung,data-clock-ratio: ratio of the data throughput in B/s to minimum data
65+
clock frequency in Hz, default value is 8 when this property is missing.
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Detailed correlation between sub-blocks and power line according to Exynos SoC:
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- In case of Exynos3250, there are two power line as following:
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VDD_MIF |--- DMC
@@ -135,7 +148,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC:
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|--- PERIC (Fixed clock rate)
136149
|--- FSYS (Fixed clock rate)
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138-
Example1:
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Example 1:
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Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
140153
power line (regulator). The MIF (Memory Interface) AXI bus is used to
141154
transfer data between DRAM and CPU and uses the VDD_MIF regulator.
@@ -184,7 +197,7 @@ Example1:
184197
|L5 |200000 |200000 |400000 |300000 | ||1000000 |
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----------------------------------------------------------
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187-
Example2 :
200+
Example 2:
188201
The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
189202
is listed below:
190203

@@ -419,3 +432,57 @@ Example2 :
419432
devfreq = <&bus_leftbus>;
420433
status = "okay";
421434
};
435+
436+
Example 3:
437+
An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on
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Exynos4412 SoC with video mixer as an interconnect consumer device.
439+
440+
soc {
441+
bus_dmc: bus_dmc {
442+
compatible = "samsung,exynos-bus";
443+
clocks = <&clock CLK_DIV_DMC>;
444+
clock-names = "bus";
445+
operating-points-v2 = <&bus_dmc_opp_table>;
446+
samsung,data-clock-ratio = <4>;
447+
#interconnect-cells = <0>;
448+
};
449+
450+
bus_leftbus: bus_leftbus {
451+
compatible = "samsung,exynos-bus";
452+
clocks = <&clock CLK_DIV_GDL>;
453+
clock-names = "bus";
454+
operating-points-v2 = <&bus_leftbus_opp_table>;
455+
#interconnect-cells = <0>;
456+
interconnects = <&bus_dmc>;
457+
};
458+
459+
bus_display: bus_display {
460+
compatible = "samsung,exynos-bus";
461+
clocks = <&clock CLK_ACLK160>;
462+
clock-names = "bus";
463+
operating-points-v2 = <&bus_display_opp_table>;
464+
#interconnect-cells = <0>;
465+
interconnects = <&bus_leftbus &bus_dmc>;
466+
};
467+
468+
bus_dmc_opp_table: opp_table1 {
469+
compatible = "operating-points-v2";
470+
/* ... */
471+
}
472+
473+
bus_leftbus_opp_table: opp_table3 {
474+
compatible = "operating-points-v2";
475+
/* ... */
476+
};
477+
478+
bus_display_opp_table: opp_table4 {
479+
compatible = "operating-points-v2";
480+
/* .. */
481+
};
482+
483+
&mixer {
484+
compatible = "samsung,exynos4212-mixer";
485+
interconnects = <&bus_display &bus_dmc>;
486+
/* ... */
487+
};
488+
};

‎MAINTAINERS

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Original file line numberDiff line numberDiff line change
@@ -11313,7 +11313,6 @@ L: [email protected]
1131311313
L: [email protected]
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git
1131511315
S: Maintained
11316-
F: drivers/devfreq/tegra20-devfreq.c
1131711316
F: drivers/devfreq/tegra30-devfreq.c
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1131911318
MEMORY MANAGEMENT

‎drivers/clk/tegra/clk-tegra20-emc.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
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#include <linux/clk-provider.h>
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#include <linux/clk/tegra.h>
1515
#include <linux/err.h>
16+
#include <linux/export.h>
1617
#include <linux/io.h>
1718
#include <linux/kernel.h>
1819
#include <linux/slab.h>
@@ -235,6 +236,7 @@ void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb,
235236
emc->cb_arg = cb_arg;
236237
}
237238
}
239+
EXPORT_SYMBOL_GPL(tegra20_clk_set_emc_round_callback);
238240

239241
bool tegra20_clk_emc_driver_available(struct clk_hw *emc_hw)
240242
{
@@ -291,3 +293,4 @@ int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same)
291293

292294
return 0;
293295
}
296+
EXPORT_SYMBOL_GPL(tegra20_clk_prepare_emc_mc_same_freq);

‎drivers/devfreq/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -121,16 +121,6 @@ config ARM_TEGRA_DEVFREQ
121121
It reads ACTMON counters of memory controllers and adjusts the
122122
operating frequencies and voltages with OPP support.
123123

124-
config ARM_TEGRA20_DEVFREQ
125-
tristate "NVIDIA Tegra20 DEVFREQ Driver"
126-
depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST
127-
depends on COMMON_CLK
128-
select DEVFREQ_GOV_SIMPLE_ONDEMAND
129-
help
130-
This adds the DEVFREQ driver for the Tegra20 family of SoCs.
131-
It reads Memory Controller counters and adjusts the operating
132-
frequencies and voltages with OPP support.
133-
134124
config ARM_RK3399_DMC_DEVFREQ
135125
tristate "ARM RK3399 DMC DEVFREQ Driver"
136126
depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \

‎drivers/devfreq/Makefile

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@ obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o
1313
obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o
1414
obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o
1515
obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o
16-
obj-$(CONFIG_ARM_TEGRA20_DEVFREQ) += tegra20-devfreq.o
1716

1817
# DEVFREQ Event Drivers
1918
obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/

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