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1 parent 117d09e commit b484b25Copy full SHA for b484b25
Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
@@ -151,6 +151,21 @@ patternProperties:
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minimum: 1
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maximum: 31
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+ mediatek,syscon-type:
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+ $ref: /schemas/types.yaml#/definitions/phandle-array
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+ description:
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+ A phandle to syscon used to access the register of type switch,
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+ the field should always be 3 cells long.
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+ items:
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+ - items:
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+ - description:
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+ Phandle to phy type configuration system controller
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+ Phy type configuration register offset
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+ Index of config segment
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+ enum: [0, 1, 2, 3]
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+
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required:
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- reg
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- clocks
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