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superm1alexdeucher
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drm/amd: Add per-ring reset for vcn v5.0.0 use
If there is a problem requiring a reset of the VCN engine, it is better to reset the VCN engine rather than the entire GPU. Add a reset callback for the ring which will stop and start VCN if an issue happens. Reviewed-by: Alex Deucher <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -196,9 +196,9 @@ static int vcn_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block)
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adev->vcn.inst[i].pause_dpg_mode = vcn_v5_0_0_pause_dpg_mode;
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}
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199-
/* TODO: Add queue reset mask when FW fully supports it */
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adev->vcn.supported_reset =
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amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
201+
adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
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vcn_v5_0_0_alloc_ip_dump(adev);
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@@ -1172,6 +1172,20 @@ static void vcn_v5_0_0_unified_ring_set_wptr(struct amdgpu_ring *ring)
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}
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}
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1175+
static int vcn_v5_0_0_ring_reset(struct amdgpu_ring *ring, unsigned int vmid)
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{
1177+
struct amdgpu_device *adev = ring->adev;
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struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[ring->me];
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if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
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return -EOPNOTSUPP;
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1183+
vcn_v5_0_0_stop(vinst);
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vcn_v5_0_0_start(vinst);
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return amdgpu_ring_test_helper(ring);
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}
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static const struct amdgpu_ring_funcs vcn_v5_0_0_unified_ring_vm_funcs = {
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.type = AMDGPU_RING_TYPE_VCN_ENC,
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.align_mask = 0x3f,
@@ -1199,6 +1213,7 @@ static const struct amdgpu_ring_funcs vcn_v5_0_0_unified_ring_vm_funcs = {
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.emit_wreg = vcn_v2_0_enc_ring_emit_wreg,
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.emit_reg_wait = vcn_v2_0_enc_ring_emit_reg_wait,
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.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,
1216+
.reset = vcn_v5_0_0_ring_reset,
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};
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/**

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