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ardbiesheuvelRussell King (Oracle)
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ARM: 9286/1: crypto: Implement fused AES-CTR/GHASH version of GCM
On 32-bit ARM, AES in GCM mode takes full advantage of the ARMv8 Crypto Extensions when available, resulting in a performance of 6-7 cycles per byte for typical IPsec frames on cores such as Cortex-A53, using the generic GCM template encapsulating the accelerated AES-CTR and GHASH implementations. At such high rates, any time spent copying data or doing other poorly optimized work in the generic layer hurts disproportionately, and we can get a significant performance improvement by combining the optimized AES-CTR and GHASH implementations into a single GCM driver. On Cortex-A53, this results in a performance improvement of around 75%, and AES-256-GCM-128 with RFC4106 encapsulation runs in 4 cycles per byte. Note that this code takes advantage of the fact that kernel mode NEON is now supported in softirq context as well, and therefore does not provide a non-NEON fallback path at all. (AEADs are only callable in process or softirq context) Acked-by: Herbert Xu <[email protected]> Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]>
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arch/arm/crypto/Kconfig

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@@ -16,8 +16,10 @@ config CRYPTO_CURVE25519_NEON
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config CRYPTO_GHASH_ARM_CE
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tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_AEAD
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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select CRYPTO_LIB_AES
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select CRYPTO_LIB_GF128MUL
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help
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GCM GHASH function (NIST SP800-38D)

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