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brentlubroonie
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ASoC: Intel: sof-rt5682: setup pll_id only when needed
The variable 'pll_id' is needed only when we use snd_soc_dai_set_pll() to setup PLL. Move the code segment to improve some readability. Reviewed-by: Bard Liao <[email protected]> Signed-off-by: Brent Lu <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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sound/soc/intel/boards/sof_rt5682.c

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -320,35 +320,6 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
320320
pll_in = params_rate(params) * 50;
321321
}
322322

323-
switch (ctx->codec_type) {
324-
case CODEC_RT5650:
325-
pll_id = 0; /* not used in codec driver */
326-
clk_id = RT5645_SCLK_S_PLL1;
327-
break;
328-
case CODEC_RT5682:
329-
pll_id = RT5682_PLL1;
330-
clk_id = RT5682_SCLK_S_PLL1;
331-
break;
332-
case CODEC_RT5682S:
333-
/*
334-
* For MCLK = 24.576MHz and sample rate = 96KHz case, use PLL1 We don't test
335-
* pll_out or params_rate() here since rt5682s PLL2 doesn't support 24.576MHz
336-
* input, so we have no choice but to use PLL1. Besides, we will not use PLL at
337-
* all if pll_in == pll_out. ex, MCLK = 24.576Mhz and sample rate = 48KHz
338-
*/
339-
if (pll_in == 24576000) {
340-
pll_id = RT5682S_PLL1;
341-
clk_id = RT5682S_SCLK_S_PLL1;
342-
} else {
343-
pll_id = RT5682S_PLL2;
344-
clk_id = RT5682S_SCLK_S_PLL2;
345-
}
346-
break;
347-
default:
348-
dev_err(rtd->dev, "invalid codec type %d\n", ctx->codec_type);
349-
return -EINVAL;
350-
}
351-
352323
pll_out = params_rate(params) * 512;
353324

354325
/* when MCLK is 512FS, no need to set PLL configuration additionally. */
@@ -369,6 +340,35 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
369340
return -EINVAL;
370341
}
371342
} else {
343+
switch (ctx->codec_type) {
344+
case CODEC_RT5650:
345+
pll_id = 0; /* not used in codec driver */
346+
clk_id = RT5645_SCLK_S_PLL1;
347+
break;
348+
case CODEC_RT5682:
349+
pll_id = RT5682_PLL1;
350+
clk_id = RT5682_SCLK_S_PLL1;
351+
break;
352+
case CODEC_RT5682S:
353+
/*
354+
* For MCLK = 24.576MHz and sample rate = 96KHz case, use PLL1 We don't test
355+
* pll_out or params_rate() here since rt5682s PLL2 doesn't support 24.576MHz
356+
* input, so we have no choice but to use PLL1. Besides, we will not use PLL at
357+
* all if pll_in == pll_out. ex, MCLK = 24.576Mhz and sample rate = 48KHz
358+
*/
359+
if (pll_in == 24576000) {
360+
pll_id = RT5682S_PLL1;
361+
clk_id = RT5682S_SCLK_S_PLL1;
362+
} else {
363+
pll_id = RT5682S_PLL2;
364+
clk_id = RT5682S_SCLK_S_PLL2;
365+
}
366+
break;
367+
default:
368+
dev_err(rtd->dev, "invalid codec type %d\n", ctx->codec_type);
369+
return -EINVAL;
370+
}
371+
372372
/* Configure pll for codec */
373373
ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in,
374374
pll_out);

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