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firmware: tf: Different way of L2 cache enabling after LP2 suspend
ASUS TF300T device may not work properly if firmware is asked to fully re-initialize L2 cache after resume from LP2 suspend. The downstream kernel of TF300T uses different opcode to enable cache after resuming from LP2, this opcode also works fine on Nexus 7 and Ouya devices. Supposedly, this may be needed by an older firmware versions. Reported-by: Michał Mirosław <[email protected]> Tested-by: Michał Mirosław <[email protected]> Tested-by: Jasper Korten <[email protected]> Tested-by: David Heidelberg <[email protected]> Tested-by: Peter Geis <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
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drivers/firmware/trusted_foundations.c

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919

2020
#define TF_CACHE_ENABLE 1
2121
#define TF_CACHE_DISABLE 2
22+
#define TF_CACHE_REENABLE 4
2223

2324
#define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200
2425

@@ -29,6 +30,7 @@
2930
#define TF_CPU_PM_S1 0xffffffe4
3031
#define TF_CPU_PM_S1_NOFLUSH_L2 0xffffffe7
3132

33+
static unsigned long tf_idle_mode = TF_PM_MODE_NONE;
3234
static unsigned long cpu_boot_addr;
3335

3436
static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
@@ -85,25 +87,40 @@ static int tf_prepare_idle(unsigned long mode)
8587
cpu_boot_addr);
8688
break;
8789

90+
case TF_PM_MODE_NONE:
91+
break;
92+
8893
default:
8994
return -EINVAL;
9095
}
9196

97+
tf_idle_mode = mode;
98+
9299
return 0;
93100
}
94101

95102
#ifdef CONFIG_CACHE_L2X0
96103
static void tf_cache_write_sec(unsigned long val, unsigned int reg)
97104
{
98-
u32 l2x0_way_mask = 0xff;
105+
u32 enable_op, l2x0_way_mask = 0xff;
99106

100107
switch (reg) {
101108
case L2X0_CTRL:
102109
if (l2x0_saved_regs.aux_ctrl & L310_AUX_CTRL_ASSOCIATIVITY_16)
103110
l2x0_way_mask = 0xffff;
104111

112+
switch (tf_idle_mode) {
113+
case TF_PM_MODE_LP2:
114+
enable_op = TF_CACHE_REENABLE;
115+
break;
116+
117+
default:
118+
enable_op = TF_CACHE_ENABLE;
119+
break;
120+
}
121+
105122
if (val == L2X0_CTRL_EN)
106-
tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_ENABLE,
123+
tf_generic_smc(TF_CACHE_MAINT, enable_op,
107124
l2x0_saved_regs.aux_ctrl);
108125
else
109126
tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_DISABLE,

include/linux/firmware/trusted_foundations.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#define TF_PM_MODE_LP1_NO_MC_CLK 2
3333
#define TF_PM_MODE_LP2 3
3434
#define TF_PM_MODE_LP2_NOFLUSH_L2 4
35+
#define TF_PM_MODE_NONE 5
3536

3637
struct trusted_foundations_platform_data {
3738
unsigned int version_major;

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