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Merge branch 'pci/dt-bindings'
- Add qcom,pcie-ipq5332 binding (Varadarajan Narayanan) - Convert fsl,mpc83xx-pcie binding to YAML (J. Neuschäfer) - Add qcom i.MX8QM and i.MX8QXP/DXP optional DMA interrupt (Alexander Stein) - Drop deprecated layerscape 'num-ib-windows' and 'num-ob-windows' from example (Krzysztof Kozlowski) - Drop unnecessary layerscape 'status' from example (Krzysztof Kozlowski) - Add common pci-ep-bus.yaml schema for exporting several peripherals of a single PCI function via devicetree (Andrea della Porta) * pci/dt-bindings: dt-bindings: PCI: Add common schema for devices accessible through PCI BARs dt-bindings: PCI: fsl,layerscape-pcie-ep: Drop unnecessary status from example dt-bindings: PCI: fsl,layerscape-pcie-ep: Drop deprecated windows dt-bindings: PCI: fsl,imx6q-pcie: Add optional DMA interrupt dt-bindings: PCI: Convert fsl,mpc83xx-pcie to YAML dt-bindings: PCI: qcom: Document the IPQ5332 PCIe controller
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Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml

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maxItems: 5
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interrupts:
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minItems: 1
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items:
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- description: builtin MSI controller.
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- description: builtin DMA controller.
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interrupt-names:
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minItems: 1
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items:
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- const: msi
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- const: dma
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reset-gpio:
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description: Should specify the GPIO for controlling the PCI bus device

Documentation/devicetree/bindings/pci/fsl,layerscape-pcie-ep.yaml

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reg-names = "regs", "addr_space";
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
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interrupt-names = "pme";
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num-ib-windows = <6>;
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num-ob-windows = <8>;
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status = "disabled";
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};
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};
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...
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
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description:
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Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs
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maintainers:
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- J. Neuschäfer <[email protected]>
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allOf:
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- $ref: /schemas/pci/pci-host-bridge.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,mpc8314-pcie
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- fsl,mpc8349-pci
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- fsl,mpc8540-pci
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- fsl,mpc8548-pcie
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- fsl,mpc8641-pcie
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- items:
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- enum:
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- fsl,mpc8308-pcie
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- fsl,mpc8315-pcie
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- fsl,mpc8377-pcie
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- fsl,mpc8378-pcie
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- const: fsl,mpc8314-pcie
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- items:
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- const: fsl,mpc8360-pci
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- const: fsl,mpc8349-pci
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- items:
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- const: fsl,mpc8540-pcix
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- const: fsl,mpc8540-pci
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reg:
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minItems: 1
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items:
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- description: internal registers
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- description: config space access registers
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clock-frequency: true
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interrupts:
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items:
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- description: Consolidated PCI interrupt
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fsl,pci-agent-force-enum:
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type: boolean
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description:
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Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
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prevented from enumerating the bus. The PrPMC form-factor requires all
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mezzanines to be PCI-X Agents, but one per system may still enumerate the
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bus.
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This property allows a PCI-X bridge to be used for bus enumeration
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despite being strapped into Agent mode.
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required:
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- reg
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- compatible
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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pcie@e0009000 {
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compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
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reg = <0xe0009000 0x00001000>;
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ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
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0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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device_type = "pci";
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bus-range = <0 255>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
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0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
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0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
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0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
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clock-frequency = <0>;
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};
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- |
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pci@ef008000 {
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compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
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reg = <0xef008000 0x1000>;
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ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
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0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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clock-frequency = <33333333>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = </* IDSEL */
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0xe000 0 0 1 &mpic 2 1
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0xe000 0 0 2 &mpic 3 1>;
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interrupts-extended = <&mpic 24 2>;
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bus-range = <0 0>;
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fsl,pci-agent-force-enum;
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};
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...

Documentation/devicetree/bindings/pci/fsl,pci.txt

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Common Properties for PCI MFD EP with Peripherals Addressable from BARs
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maintainers:
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- A. della Porta <[email protected]>
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description:
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Define a generic node representing a PCI endpoint which contains several sub-
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peripherals. The peripherals can be accessed through one or more BARs.
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This common schema is intended to be referenced from device tree bindings and
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does not represent a device tree binding by itself.
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properties:
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'#address-cells':
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const: 3
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'#size-cells':
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const: 2
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ranges:
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minItems: 1
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maxItems: 6
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items:
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maxItems: 8
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additionalItems: true
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items:
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- maximum: 5 # The BAR number
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- const: 0
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- const: 0
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patternProperties:
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'^pci-ep-bus@[0-5]$':
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type: object
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description:
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One node for each BAR used by peripherals contained in the PCI endpoint.
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Each node represents a bus on which peripherals are connected.
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This allows for some segmentation, e.g., one peripheral is accessible
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through BAR0 and another through BAR1, and you don't want the two
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peripherals to be able to act on the other BAR. Alternatively, when
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different peripherals need to share BARs, you can define only one node
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and use a 'ranges' property to map all the used BARs.
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additionalProperties: true
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properties:
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compatible:
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const: simple-bus
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required:
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- compatible
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additionalProperties: true
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...

Documentation/devicetree/bindings/pci/qcom,pcie.yaml

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- qcom,pcie-sdx55
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- items:
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- enum:
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- qcom,pcie-ipq5332
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- qcom,pcie-ipq5424
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- const: qcom,pcie-ipq9574
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- items:
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interrupts:
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minItems: 1
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maxItems: 8
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maxItems: 9
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interrupt-names:
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minItems: 1
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maxItems: 8
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maxItems: 9
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iommu-map:
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minItems: 1
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interrupts:
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minItems: 8
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interrupt-names:
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minItems: 8
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items:
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- const: msi0
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- const: msi1
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- const: msi5
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- const: msi6
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- const: msi7
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- const: global
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- if:
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properties:
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- properties:
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interrupts:
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minItems: 8
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maxItems: 8
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interrupt-names:
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items:
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- const: msi0

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