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i.MX arm64 device tree change for 6.11: - New board support: imx8mm-iot-gateway, imx93-9x9-qsb, imx95-19x19-evk, imx8mp-tqma8mpql-mba8mp-ras314, etc. - A series from Adam Ford that improves imx8mp-beacon-kit support by fixing dtschema issues and enabling HDMI bridge HPD - A set of changes from Alexander Stein that adds partitions subnode to spi-nor - A great number of changes from Frank Li that add audio, flexcan, gpmi related devices for imx8dxl, imx8qm based boards - A bunch of layerscape dtschema issue fixes from Frank Li - A series from Krzysztof Kozlowski to use defines for interrupts - A number of improvements on i.MX8MP DHCOM devices from Marek Vasut - A couple of changes from Parthiban Nallathambi that add PCIe PHY and RS232/RS485 overlays for phygate-tauri-l board - A series from Shengjiu Wang that adds bt-sco and XCVR sound card support for imx8mp-evk - A series from Tim Harvey that fixes dt-schema warnings and adds DP83867 configuration for i.MX8M Venice devices - Other random feature additions and improvments on various boards * tag 'imx-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (91 commits) arm64: dts: imx8mp: Remove 'snps,rx-sched-sp' arm64: dts: imx8mm-verdin: add TPM device arm64: dts: imx8mp-evk: Add audio XCVR sound card arm64: dts: imx8mp: Add audio XCVR device node arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM rev.200 arm64: dts: imx8mp: Do not reconfigure Audio PLL2 on DH i.MX8M Plus DHCOM SoM arm64: dts: layerscape: rename b(q)man-portals to b(q)man-portals-bus arm64: dts: fsl-ls1046a: rename thermal node name arm64: dts: fsl-ls1043a: remove unused clk-name at watchdog node arm64: dts: layerscape: rename aux_bus to aux-bus arm64: dts: layerscape: change pcie interrupt order arm64: dts: layerscape: rename node name "wdt" to "watchdog" arm64: dts: layerscape: add #dma-cells for qdma arm64: dts: layerscape: remove compatible string 'fsl,fman-xmdio' for fman3 arm64: dts: layerscape: replace node name 'nor' with 'flash' arm64: dts: fsl-ls1012a: remove property 'snps,host-vbus-glitches' arm64: dts: fsl-lx2160a: fix #address-cells for pinctrl-single arm64: dts: layerscape: add platform special compatible string for gpio arm64: dts: layerscape: rename node 'timer' as 'rtc' arm64: dts: imx8qxp-mek: Pass memory-region to the DSP node ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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‎arch/arm64/boot/dts/freescale/Makefile

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -114,6 +114,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
114114
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evkb.dtb
115115
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
116116
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
117+
dtb-$(CONFIG_ARCH_MXC) += imx8mm-iot-gateway.dtb
117118
dtb-$(CONFIG_ARCH_MXC) += imx8mm-innocomm-wb15-evk.dtb
118119
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl.dtb
119120
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl-osm-s.dtb
@@ -177,6 +178,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
177178
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
178179
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
179180
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
181+
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb
180182
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
181183
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
182184
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
@@ -191,6 +193,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb
191193
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-mallow.dtb
192194
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-yavia.dtb
193195

196+
imx8mp-evk-mx8-dlvds-lcd1-dtbs += imx8mp-evk.dtb imx8mp-evk-mx8-dlvds-lcd1.dtbo
197+
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-mx8-dlvds-lcd1.dtb
198+
194199
imx8mp-tqma8mpql-mba8mpxl-lvds-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds.dtbo
195200
imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtbo
196201
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds.dtb
@@ -231,11 +236,13 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb
231236
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
232237
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb
233238
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
239+
dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb
234240
dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
235241
dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb
236242
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
237243
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
238244
dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
245+
dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb
239246

240247
imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo
241248
imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo
@@ -263,6 +270,14 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs485.dtb
263270
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx-imx219.dtb
264271
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx-rpidsi.dtb
265272

273+
imx8mm-phygate-tauri-l-rs232-rs232-dtbs := imx8mm-phygate-tauri-l.dtb imx8mm-phygate-tauri-l-rs232-rs232.dtbo
274+
imx8mm-phygate-tauri-l-rs232-cts-rts-dtbs := imx8mm-phygate-tauri-l.dtb imx8mm-phygate-tauri-l-rs232-rts-cts.dtbo
275+
imx8mm-phygate-tauri-l-rs232-rs485-dtbs := imx8mm-phygate-tauri-l.dtb imx8mm-phygate-tauri-l-rs232-rs485.dtbo
276+
277+
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l-rs232-rs232.dtb
278+
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l-rs232-cts-rts.dtb
279+
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l-rs232-rs485.dtb
280+
266281
dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb
267282
dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb
268283
dtb-$(CONFIG_ARCH_S32) += s32g399a-rdb3.dtb

‎arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

Lines changed: 39 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -74,15 +74,15 @@
7474

7575
timer {
7676
compatible = "arm,armv8-timer";
77-
interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
78-
<1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
79-
<1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
80-
<1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
77+
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
78+
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
79+
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
80+
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
8181
};
8282

8383
pmu {
8484
compatible = "arm,cortex-a53-pmu";
85-
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
85+
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
8686
};
8787

8888
gic: interrupt-controller@1400000 {
@@ -93,7 +93,7 @@
9393
<0x0 0x1402000 0 0x2000>, /* GICC */
9494
<0x0 0x1404000 0 0x2000>, /* GICH */
9595
<0x0 0x1406000 0 0x2000>; /* GICV */
96-
interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
96+
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
9797
};
9898

9999
reboot {
@@ -156,10 +156,10 @@
156156
status = "disabled";
157157
};
158158

159-
esdhc0: esdhc@1560000 {
159+
esdhc0: mmc@1560000 {
160160
compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
161161
reg = <0x0 0x1560000 0x0 0x10000>;
162-
interrupts = <0 62 0x4>;
162+
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
163163
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
164164
QORIQ_CLK_PLL_DIV(1)>;
165165
voltage-ranges = <1800 1800 3300 3300>;
@@ -175,10 +175,10 @@
175175
big-endian;
176176
};
177177

178-
esdhc1: esdhc@1580000 {
178+
esdhc1: mmc@1580000 {
179179
compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
180180
reg = <0x0 0x1580000 0x0 0x10000>;
181-
interrupts = <0 65 0x4>;
181+
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
182182
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
183183
QORIQ_CLK_PLL_DIV(1)>;
184184
voltage-ranges = <1800 1800 3300 3300>;
@@ -305,7 +305,7 @@
305305
tmu: tmu@1f00000 {
306306
compatible = "fsl,qoriq-tmu";
307307
reg = <0x0 0x1f00000 0x0 0x10000>;
308-
interrupts = <0 33 0x4>;
308+
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
309309
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x60062>;
310310
fsl,tmu-calibration =
311311
<0x00000000 0x00000025>,
@@ -355,7 +355,7 @@
355355
#address-cells = <1>;
356356
#size-cells = <0>;
357357
reg = <0x0 0x2180000 0x0 0x10000>;
358-
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
358+
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
359359
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
360360
QORIQ_CLK_PLL_DIV(4)>;
361361
scl-gpios = <&gpio0 2 0>;
@@ -367,7 +367,7 @@
367367
#address-cells = <1>;
368368
#size-cells = <0>;
369369
reg = <0x0 0x2190000 0x0 0x10000>;
370-
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
370+
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
371371
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
372372
QORIQ_CLK_PLL_DIV(4)>;
373373
scl-gpios = <&gpio0 13 0>;
@@ -379,7 +379,7 @@
379379
#address-cells = <1>;
380380
#size-cells = <0>;
381381
reg = <0x0 0x2100000 0x0 0x10000>;
382-
interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
382+
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
383383
clock-names = "dspi";
384384
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
385385
QORIQ_CLK_PLL_DIV(1)>;
@@ -391,7 +391,7 @@
391391
duart0: serial@21c0500 {
392392
compatible = "fsl,ns16550", "ns16550a";
393393
reg = <0x00 0x21c0500 0x0 0x100>;
394-
interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
394+
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
395395
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
396396
QORIQ_CLK_PLL_DIV(1)>;
397397
status = "disabled";
@@ -400,26 +400,26 @@
400400
duart1: serial@21c0600 {
401401
compatible = "fsl,ns16550", "ns16550a";
402402
reg = <0x00 0x21c0600 0x0 0x100>;
403-
interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
403+
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
404404
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
405405
QORIQ_CLK_PLL_DIV(1)>;
406406
status = "disabled";
407407
};
408408

409409
gpio0: gpio@2300000 {
410-
compatible = "fsl,qoriq-gpio";
410+
compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
411411
reg = <0x0 0x2300000 0x0 0x10000>;
412-
interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
412+
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
413413
gpio-controller;
414414
#gpio-cells = <2>;
415415
interrupt-controller;
416416
#interrupt-cells = <2>;
417417
};
418418

419419
gpio1: gpio@2310000 {
420-
compatible = "fsl,qoriq-gpio";
420+
compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
421421
reg = <0x0 0x2310000 0x0 0x10000>;
422-
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
422+
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
423423
gpio-controller;
424424
#gpio-cells = <2>;
425425
interrupt-controller;
@@ -430,7 +430,7 @@
430430
compatible = "fsl,ls1012a-wdt",
431431
"fsl,imx21-wdt";
432432
reg = <0x0 0x2ad0000 0x0 0x10000>;
433-
interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
433+
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
434434
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>;
435435
big-endian;
436436
};
@@ -439,7 +439,7 @@
439439
#sound-dai-cells = <0>;
440440
compatible = "fsl,vf610-sai";
441441
reg = <0x0 0x2b50000 0x0 0x10000>;
442-
interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
442+
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
443443
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
444444
QORIQ_CLK_PLL_DIV(4)>,
445445
<&clockgen QORIQ_CLK_PLATFORM_PLL
@@ -449,17 +449,17 @@
449449
<&clockgen QORIQ_CLK_PLATFORM_PLL
450450
QORIQ_CLK_PLL_DIV(4)>;
451451
clock-names = "bus", "mclk1", "mclk2", "mclk3";
452-
dma-names = "tx", "rx";
453-
dmas = <&edma0 1 47>,
454-
<&edma0 1 46>;
452+
dma-names = "rx", "tx";
453+
dmas = <&edma0 1 46>,
454+
<&edma0 1 47>;
455455
status = "disabled";
456456
};
457457

458458
sai2: sai@2b60000 {
459459
#sound-dai-cells = <0>;
460460
compatible = "fsl,vf610-sai";
461461
reg = <0x0 0x2b60000 0x0 0x10000>;
462-
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
462+
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
463463
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
464464
QORIQ_CLK_PLL_DIV(4)>,
465465
<&clockgen QORIQ_CLK_PLATFORM_PLL
@@ -469,9 +469,9 @@
469469
<&clockgen QORIQ_CLK_PLATFORM_PLL
470470
QORIQ_CLK_PLL_DIV(4)>;
471471
clock-names = "bus", "mclk1", "mclk2", "mclk3";
472-
dma-names = "tx", "rx";
473-
dmas = <&edma0 1 45>,
474-
<&edma0 1 44>;
472+
dma-names = "rx", "tx";
473+
dmas = <&edma0 1 44>,
474+
<&edma0 1 45>;
475475
status = "disabled";
476476
};
477477

@@ -481,8 +481,8 @@
481481
reg = <0x0 0x2c00000 0x0 0x10000>,
482482
<0x0 0x2c10000 0x0 0x10000>,
483483
<0x0 0x2c20000 0x0 0x10000>;
484-
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
485-
<0 103 IRQ_TYPE_LEVEL_HIGH>;
484+
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
485+
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
486486
interrupt-names = "edma-tx", "edma-err";
487487
dma-channels = <32>;
488488
big-endian;
@@ -496,20 +496,19 @@
496496
usb0: usb@2f00000 {
497497
compatible = "snps,dwc3";
498498
reg = <0x0 0x2f00000 0x0 0x10000>;
499-
interrupts = <0 60 0x4>;
499+
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
500500
dr_mode = "host";
501501
snps,quirk-frame-length-adjustment = <0x20>;
502502
snps,dis_rxdet_inp3_quirk;
503503
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
504-
snps,host-vbus-glitches;
505504
};
506505

507506
sata: sata@3200000 {
508507
compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
509508
reg = <0x0 0x3200000 0x0 0x10000>,
510509
<0x0 0x20140520 0x0 0x4>;
511510
reg-names = "ahci", "sata-ecc";
512-
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
511+
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
513512
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
514513
QORIQ_CLK_PLL_DIV(1)>;
515514
dma-coherent;
@@ -519,7 +518,7 @@
519518
usb1: usb@8600000 {
520519
compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
521520
reg = <0x0 0x8600000 0x0 0x1000>;
522-
interrupts = <0 139 0x4>;
521+
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
523522
dr_mode = "host";
524523
phy_type = "ulpi";
525524
};
@@ -528,17 +527,17 @@
528527
compatible = "fsl,ls1012a-msi";
529528
reg = <0x0 0x1572000 0x0 0x8>;
530529
msi-controller;
531-
interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
530+
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
532531
};
533532

534533
pcie1: pcie@3400000 {
535534
compatible = "fsl,ls1012a-pcie";
536535
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
537536
<0x40 0x00000000 0x0 0x00002000>; /* configuration space */
538537
reg-names = "regs", "config";
539-
interrupts = <0 118 0x4>, /* controller interrupt */
540-
<0 117 0x4>; /* PME interrupt */
541-
interrupt-names = "aer", "pme";
538+
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
539+
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
540+
interrupt-names = "pme", "aer";
542541
#address-cells = <3>;
543542
#size-cells = <2>;
544543
device_type = "pci";
@@ -563,7 +562,7 @@
563562
#fsl,rcpm-wakeup-cells = <1>;
564563
};
565564

566-
ftm_alarm0: timer@29d0000 {
565+
ftm_alarm0: rtc@29d0000 {
567566
compatible = "fsl,ls1012a-ftm-alarm";
568567
reg = <0x0 0x29d0000 0x0 0x10000>;
569568
fsl,rcpm-wakeup = <&rcpm 0x20000>;

‎arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -201,6 +201,37 @@
201201
#address-cells = <1>;
202202
#size-cells = <0>;
203203

204+
i2c@0 {
205+
#address-cells = <1>;
206+
#size-cells = <0>;
207+
reg = <0x0>;
208+
209+
/* Atmel AT24C512C-XHD­B: 64 KB EEPROM */
210+
eeprom@50 {
211+
compatible = "atmel,24c512";
212+
reg = <0x50>;
213+
#address-cells = <1>;
214+
#size-cells = <1>;
215+
};
216+
217+
/* AT24C04C 512-byte DDR4 SPD EEPROM */
218+
/* Documentation says 0x51, but must be even and i2cdetect says 0x52 */
219+
eeprom@52 {
220+
compatible = "atmel,24c04";
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reg = <0x52>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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226+
/* Atmel AT24C02C-XHM­B: 256-byte EEPROM */
227+
eeprom@57 {
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compatible = "atmel,24c02";
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reg = <0x57>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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204235
i2c@1 {
205236
#address-cells = <1>;
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#size-cells = <0>;

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