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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt8183-dvfsrc.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: MediaTek Dynamic Voltage and Frequency Scaling Resource Collector (DVFSRC) |
| 8 | + |
| 9 | +description: |
| 10 | + The Dynamic Voltage and Frequency Scaling Resource Collector (DVFSRC) is a |
| 11 | + Hardware module used to collect all the requests from both software and the |
| 12 | + various remote processors embedded into the SoC and decide about a minimum |
| 13 | + operating voltage and a minimum DRAM frequency to fulfill those requests in |
| 14 | + an effort to provide the best achievable performance per watt. |
| 15 | + This hardware IP is capable of transparently performing direct register R/W |
| 16 | + on all of the DVFSRC-controlled regulators and SoC bandwidth knobs. |
| 17 | + |
| 18 | +maintainers: |
| 19 | + - AngeloGioacchino Del Regno <[email protected]> |
| 20 | + |
| 21 | + |
| 22 | +properties: |
| 23 | + compatible: |
| 24 | + oneOf: |
| 25 | + - enum: |
| 26 | + - mediatek,mt8183-dvfsrc |
| 27 | + - mediatek,mt8195-dvfsrc |
| 28 | + - items: |
| 29 | + - const: mediatek,mt8192-dvfsrc |
| 30 | + - const: mediatek,mt8195-dvfsrc |
| 31 | + |
| 32 | + reg: |
| 33 | + maxItems: 1 |
| 34 | + description: DVFSRC common register address and length. |
| 35 | + |
| 36 | + regulators: |
| 37 | + type: object |
| 38 | + $ref: /schemas/regulator/mediatek,mt6873-dvfsrc-regulator.yaml# |
| 39 | + |
| 40 | + interconnect: |
| 41 | + type: object |
| 42 | + $ref: /schemas/interconnect/mediatek,mt8183-emi.yaml# |
| 43 | + |
| 44 | +required: |
| 45 | + - compatible |
| 46 | + - reg |
| 47 | + |
| 48 | +additionalProperties: false |
| 49 | + |
| 50 | +examples: |
| 51 | + - | |
| 52 | + soc { |
| 53 | + #address-cells = <2>; |
| 54 | + #size-cells = <2>; |
| 55 | +
|
| 56 | + system-controller@10012000 { |
| 57 | + compatible = "mediatek,mt8195-dvfsrc"; |
| 58 | + reg = <0 0x10012000 0 0x1000>; |
| 59 | +
|
| 60 | + regulators { |
| 61 | + compatible = "mediatek,mt8195-dvfsrc-regulator"; |
| 62 | +
|
| 63 | + dvfsrc_vcore: dvfsrc-vcore { |
| 64 | + regulator-name = "dvfsrc-vcore"; |
| 65 | + regulator-min-microvolt = <550000>; |
| 66 | + regulator-max-microvolt = <750000>; |
| 67 | + regulator-always-on; |
| 68 | + }; |
| 69 | +
|
| 70 | + dvfsrc_vscp: dvfsrc-vscp { |
| 71 | + regulator-name = "dvfsrc-vscp"; |
| 72 | + regulator-min-microvolt = <550000>; |
| 73 | + regulator-max-microvolt = <750000>; |
| 74 | + regulator-always-on; |
| 75 | + }; |
| 76 | + }; |
| 77 | +
|
| 78 | + emi_icc: interconnect { |
| 79 | + compatible = "mediatek,mt8195-emi"; |
| 80 | + #interconnect-cells = <1>; |
| 81 | + }; |
| 82 | + }; |
| 83 | + }; |
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