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LuBaolujoergroedel
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iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller
Fold dmar_insert_one_dev_info() into domain_add_dev_info() which is its only caller. No intentional functional impact. Suggested-by: Christoph Hellwig <[email protected]> Signed-off-by: Lu Baolu <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/intel/iommu.c

Lines changed: 51 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -2452,64 +2452,6 @@ static bool dev_is_real_dma_subdevice(struct device *dev)
24522452
pci_real_dma_dev(to_pci_dev(dev)) != to_pci_dev(dev);
24532453
}
24542454

2455-
static int dmar_insert_one_dev_info(struct intel_iommu *iommu, int bus,
2456-
int devfn, struct device *dev,
2457-
struct dmar_domain *domain)
2458-
{
2459-
struct device_domain_info *info = dev_iommu_priv_get(dev);
2460-
unsigned long flags;
2461-
int ret;
2462-
2463-
spin_lock_irqsave(&device_domain_lock, flags);
2464-
info->domain = domain;
2465-
spin_lock(&iommu->lock);
2466-
ret = domain_attach_iommu(domain, iommu);
2467-
spin_unlock(&iommu->lock);
2468-
if (ret) {
2469-
spin_unlock_irqrestore(&device_domain_lock, flags);
2470-
return ret;
2471-
}
2472-
list_add(&info->link, &domain->devices);
2473-
spin_unlock_irqrestore(&device_domain_lock, flags);
2474-
2475-
/* PASID table is mandatory for a PCI device in scalable mode. */
2476-
if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
2477-
ret = intel_pasid_alloc_table(dev);
2478-
if (ret) {
2479-
dev_err(dev, "PASID table allocation failed\n");
2480-
dmar_remove_one_dev_info(dev);
2481-
return ret;
2482-
}
2483-
2484-
/* Setup the PASID entry for requests without PASID: */
2485-
spin_lock_irqsave(&iommu->lock, flags);
2486-
if (hw_pass_through && domain_type_is_si(domain))
2487-
ret = intel_pasid_setup_pass_through(iommu, domain,
2488-
dev, PASID_RID2PASID);
2489-
else if (domain_use_first_level(domain))
2490-
ret = domain_setup_first_level(iommu, domain, dev,
2491-
PASID_RID2PASID);
2492-
else
2493-
ret = intel_pasid_setup_second_level(iommu, domain,
2494-
dev, PASID_RID2PASID);
2495-
spin_unlock_irqrestore(&iommu->lock, flags);
2496-
if (ret) {
2497-
dev_err(dev, "Setup RID2PASID failed\n");
2498-
dmar_remove_one_dev_info(dev);
2499-
return ret;
2500-
}
2501-
}
2502-
2503-
ret = domain_context_mapping(domain, dev);
2504-
if (ret) {
2505-
dev_err(dev, "Domain context map failed\n");
2506-
dmar_remove_one_dev_info(dev);
2507-
return ret;
2508-
}
2509-
2510-
return 0;
2511-
}
2512-
25132455
static int iommu_domain_identity_map(struct dmar_domain *domain,
25142456
unsigned long first_vpfn,
25152457
unsigned long last_vpfn)
@@ -2585,14 +2527,64 @@ static int __init si_domain_init(int hw)
25852527

25862528
static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev)
25872529
{
2530+
struct device_domain_info *info = dev_iommu_priv_get(dev);
25882531
struct intel_iommu *iommu;
2532+
unsigned long flags;
25892533
u8 bus, devfn;
2534+
int ret;
25902535

25912536
iommu = device_to_iommu(dev, &bus, &devfn);
25922537
if (!iommu)
25932538
return -ENODEV;
25942539

2595-
return dmar_insert_one_dev_info(iommu, bus, devfn, dev, domain);
2540+
spin_lock_irqsave(&device_domain_lock, flags);
2541+
info->domain = domain;
2542+
spin_lock(&iommu->lock);
2543+
ret = domain_attach_iommu(domain, iommu);
2544+
spin_unlock(&iommu->lock);
2545+
if (ret) {
2546+
spin_unlock_irqrestore(&device_domain_lock, flags);
2547+
return ret;
2548+
}
2549+
list_add(&info->link, &domain->devices);
2550+
spin_unlock_irqrestore(&device_domain_lock, flags);
2551+
2552+
/* PASID table is mandatory for a PCI device in scalable mode. */
2553+
if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
2554+
ret = intel_pasid_alloc_table(dev);
2555+
if (ret) {
2556+
dev_err(dev, "PASID table allocation failed\n");
2557+
dmar_remove_one_dev_info(dev);
2558+
return ret;
2559+
}
2560+
2561+
/* Setup the PASID entry for requests without PASID: */
2562+
spin_lock_irqsave(&iommu->lock, flags);
2563+
if (hw_pass_through && domain_type_is_si(domain))
2564+
ret = intel_pasid_setup_pass_through(iommu, domain,
2565+
dev, PASID_RID2PASID);
2566+
else if (domain_use_first_level(domain))
2567+
ret = domain_setup_first_level(iommu, domain, dev,
2568+
PASID_RID2PASID);
2569+
else
2570+
ret = intel_pasid_setup_second_level(iommu, domain,
2571+
dev, PASID_RID2PASID);
2572+
spin_unlock_irqrestore(&iommu->lock, flags);
2573+
if (ret) {
2574+
dev_err(dev, "Setup RID2PASID failed\n");
2575+
dmar_remove_one_dev_info(dev);
2576+
return ret;
2577+
}
2578+
}
2579+
2580+
ret = domain_context_mapping(domain, dev);
2581+
if (ret) {
2582+
dev_err(dev, "Domain context map failed\n");
2583+
dmar_remove_one_dev_info(dev);
2584+
return ret;
2585+
}
2586+
2587+
return 0;
25962588
}
25972589

25982590
static bool device_has_rmrr(struct device *dev)

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