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47 | 47 | #define AM625_SUPPORT_S_MPU_OPP BIT(1)
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48 | 48 | #define AM625_SUPPORT_T_MPU_OPP BIT(2)
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49 | 49 |
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| 50 | +enum { |
| 51 | + AM62A7_EFUSE_M_MPU_OPP = 13, |
| 52 | + AM62A7_EFUSE_N_MPU_OPP, |
| 53 | + AM62A7_EFUSE_O_MPU_OPP, |
| 54 | + AM62A7_EFUSE_P_MPU_OPP, |
| 55 | + AM62A7_EFUSE_Q_MPU_OPP, |
| 56 | + AM62A7_EFUSE_R_MPU_OPP, |
| 57 | + AM62A7_EFUSE_S_MPU_OPP, |
| 58 | + /* |
| 59 | + * The V, U, and T speed grade numbering is out of order |
| 60 | + * to align with the AM625 more uniformly. I promise I know |
| 61 | + * my ABCs ;) |
| 62 | + */ |
| 63 | + AM62A7_EFUSE_V_MPU_OPP, |
| 64 | + AM62A7_EFUSE_U_MPU_OPP, |
| 65 | + AM62A7_EFUSE_T_MPU_OPP, |
| 66 | +}; |
| 67 | + |
| 68 | +#define AM62A7_SUPPORT_N_MPU_OPP BIT(0) |
| 69 | +#define AM62A7_SUPPORT_R_MPU_OPP BIT(1) |
| 70 | +#define AM62A7_SUPPORT_V_MPU_OPP BIT(2) |
| 71 | + |
50 | 72 | #define VERSION_COUNT 2
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51 | 73 |
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52 | 74 | struct ti_cpufreq_data;
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@@ -112,6 +134,32 @@ static unsigned long omap3_efuse_xlate(struct ti_cpufreq_data *opp_data,
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112 | 134 | return BIT(efuse);
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113 | 135 | }
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114 | 136 |
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| 137 | +static unsigned long am62a7_efuse_xlate(struct ti_cpufreq_data *opp_data, |
| 138 | + unsigned long efuse) |
| 139 | +{ |
| 140 | + unsigned long calculated_efuse = AM62A7_SUPPORT_N_MPU_OPP; |
| 141 | + |
| 142 | + switch (efuse) { |
| 143 | + case AM62A7_EFUSE_V_MPU_OPP: |
| 144 | + case AM62A7_EFUSE_U_MPU_OPP: |
| 145 | + case AM62A7_EFUSE_T_MPU_OPP: |
| 146 | + case AM62A7_EFUSE_S_MPU_OPP: |
| 147 | + calculated_efuse |= AM62A7_SUPPORT_V_MPU_OPP; |
| 148 | + fallthrough; |
| 149 | + case AM62A7_EFUSE_R_MPU_OPP: |
| 150 | + case AM62A7_EFUSE_Q_MPU_OPP: |
| 151 | + case AM62A7_EFUSE_P_MPU_OPP: |
| 152 | + case AM62A7_EFUSE_O_MPU_OPP: |
| 153 | + calculated_efuse |= AM62A7_SUPPORT_R_MPU_OPP; |
| 154 | + fallthrough; |
| 155 | + case AM62A7_EFUSE_N_MPU_OPP: |
| 156 | + case AM62A7_EFUSE_M_MPU_OPP: |
| 157 | + calculated_efuse |= AM62A7_SUPPORT_N_MPU_OPP; |
| 158 | + } |
| 159 | + |
| 160 | + return calculated_efuse; |
| 161 | +} |
| 162 | + |
115 | 163 | static unsigned long am625_efuse_xlate(struct ti_cpufreq_data *opp_data,
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116 | 164 | unsigned long efuse)
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117 | 165 | {
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@@ -234,6 +282,15 @@ static struct ti_cpufreq_soc_data am625_soc_data = {
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234 | 282 | .multi_regulator = false,
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235 | 283 | };
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236 | 284 |
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| 285 | +static struct ti_cpufreq_soc_data am62a7_soc_data = { |
| 286 | + .efuse_xlate = am62a7_efuse_xlate, |
| 287 | + .efuse_offset = 0x0, |
| 288 | + .efuse_mask = 0x07c0, |
| 289 | + .efuse_shift = 0x6, |
| 290 | + .rev_offset = 0x0014, |
| 291 | + .multi_regulator = false, |
| 292 | +}; |
| 293 | + |
237 | 294 | /**
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238 | 295 | * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
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239 | 296 | * @opp_data: pointer to ti_cpufreq_data context
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@@ -337,7 +394,7 @@ static const struct of_device_id ti_cpufreq_of_match[] = {
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337 | 394 | { .compatible = "ti,omap34xx", .data = &omap34xx_soc_data, },
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338 | 395 | { .compatible = "ti,omap36xx", .data = &omap36xx_soc_data, },
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339 | 396 | { .compatible = "ti,am625", .data = &am625_soc_data, },
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340 |
| - { .compatible = "ti,am62a7", .data = &am625_soc_data, }, |
| 397 | + { .compatible = "ti,am62a7", .data = &am62a7_soc_data, }, |
341 | 398 | { .compatible = "ti,am62p5", .data = &am625_soc_data, },
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342 | 399 | /* legacy */
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343 | 400 | { .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
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