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ouptonMarc Zyngier
oupton
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Marc Zyngier
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KVM: selftests: Add a minimal library for interacting with an ITS
A prerequisite of testing LPI injection performance is of course instantiating an ITS for the guest. Add a small library for creating an ITS and interacting with it from the guest. Signed-off-by: Oliver Upton <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Marc Zyngier <[email protected]>
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‎tools/testing/selftests/kvm/Makefile

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@@ -45,6 +45,7 @@ LIBKVM_x86_64 += lib/x86_64/vmx.c
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LIBKVM_aarch64 += lib/aarch64/gic.c
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LIBKVM_aarch64 += lib/aarch64/gic_v3.c
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LIBKVM_aarch64 += lib/aarch64/gic_v3_its.c
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LIBKVM_aarch64 += lib/aarch64/handlers.S
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LIBKVM_aarch64 += lib/aarch64/processor.c
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LIBKVM_aarch64 += lib/aarch64/spinlock.c

‎tools/testing/selftests/kvm/include/aarch64/gic.h

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@@ -13,10 +13,16 @@ enum gic_type {
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GIC_TYPE_MAX,
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};
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#define GICD_BASE_GPA 0x8000000ULL
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/*
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* Note that the redistributor frames are at the end, as the range scales
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* with the number of vCPUs in the VM.
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*/
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#define GITS_BASE_GPA 0x8000000ULL
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#define GICD_BASE_GPA (GITS_BASE_GPA + KVM_VGIC_V3_ITS_SIZE)
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#define GICR_BASE_GPA (GICD_BASE_GPA + KVM_VGIC_V3_DIST_SIZE)
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/* The GIC is identity-mapped into the guest at the time of setup. */
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#define GITS_BASE_GVA ((volatile void *)GITS_BASE_GPA)
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#define GICD_BASE_GVA ((volatile void *)GICD_BASE_GPA)
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#define GICR_BASE_GVA ((volatile void *)GICR_BASE_GPA)
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‎tools/testing/selftests/kvm/include/aarch64/gic_v3_its.h

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@@ -0,0 +1,19 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __SELFTESTS_GIC_V3_ITS_H__
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#define __SELFTESTS_GIC_V3_ITS_H__
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#include <linux/sizes.h>
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void its_init(vm_paddr_t coll_tbl, size_t coll_tbl_sz,
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vm_paddr_t device_tbl, size_t device_tbl_sz,
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vm_paddr_t cmdq, size_t cmdq_size);
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void its_send_mapd_cmd(void *cmdq_base, u32 device_id, vm_paddr_t itt_base,
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size_t itt_size, bool valid);
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void its_send_mapc_cmd(void *cmdq_base, u32 vcpu_id, u32 collection_id, bool valid);
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void its_send_mapti_cmd(void *cmdq_base, u32 device_id, u32 event_id,
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u32 collection_id, u32 intid);
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void its_send_invall_cmd(void *cmdq_base, u32 collection_id);
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#endif // __SELFTESTS_GIC_V3_ITS_H__

‎tools/testing/selftests/kvm/include/aarch64/vgic.h

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@@ -32,4 +32,6 @@ void kvm_irq_write_isactiver(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu);
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#define KVM_IRQCHIP_NUM_PINS (1020 - 32)
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int vgic_its_setup(struct kvm_vm *vm);
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#endif // SELFTEST_KVM_VGIC_H

‎tools/testing/selftests/kvm/lib/aarch64/gic_v3_its.c

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Guest ITS library, generously donated by drivers/irqchip/irq-gic-v3-its.c
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* over in the kernel tree.
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*/
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#include <linux/kvm.h>
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#include <linux/sizes.h>
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#include <asm/kvm_para.h>
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#include <asm/kvm.h>
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#include "kvm_util.h"
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#include "vgic.h"
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#include "gic.h"
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#include "gic_v3.h"
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#include "processor.h"
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static u64 its_read_u64(unsigned long offset)
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{
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return readq_relaxed(GITS_BASE_GVA + offset);
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}
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static void its_write_u64(unsigned long offset, u64 val)
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{
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writeq_relaxed(val, GITS_BASE_GVA + offset);
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}
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static u32 its_read_u32(unsigned long offset)
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{
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return readl_relaxed(GITS_BASE_GVA + offset);
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}
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static void its_write_u32(unsigned long offset, u32 val)
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{
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writel_relaxed(val, GITS_BASE_GVA + offset);
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}
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static unsigned long its_find_baser(unsigned int type)
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{
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int i;
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for (i = 0; i < GITS_BASER_NR_REGS; i++) {
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u64 baser;
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unsigned long offset = GITS_BASER + (i * sizeof(baser));
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baser = its_read_u64(offset);
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if (GITS_BASER_TYPE(baser) == type)
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return offset;
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}
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GUEST_FAIL("Couldn't find an ITS BASER of type %u", type);
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return -1;
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}
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static void its_install_table(unsigned int type, vm_paddr_t base, size_t size)
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{
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unsigned long offset = its_find_baser(type);
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u64 baser;
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baser = ((size / SZ_64K) - 1) |
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GITS_BASER_PAGE_SIZE_64K |
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GITS_BASER_InnerShareable |
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base |
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GITS_BASER_RaWaWb |
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GITS_BASER_VALID;
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its_write_u64(offset, baser);
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}
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static void its_install_cmdq(vm_paddr_t base, size_t size)
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{
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u64 cbaser;
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cbaser = ((size / SZ_4K) - 1) |
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GITS_CBASER_InnerShareable |
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base |
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GITS_CBASER_RaWaWb |
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GITS_CBASER_VALID;
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its_write_u64(GITS_CBASER, cbaser);
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}
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void its_init(vm_paddr_t coll_tbl, size_t coll_tbl_sz,
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vm_paddr_t device_tbl, size_t device_tbl_sz,
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vm_paddr_t cmdq, size_t cmdq_size)
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{
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u32 ctlr;
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its_install_table(GITS_BASER_TYPE_COLLECTION, coll_tbl, coll_tbl_sz);
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its_install_table(GITS_BASER_TYPE_DEVICE, device_tbl, device_tbl_sz);
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its_install_cmdq(cmdq, cmdq_size);
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ctlr = its_read_u32(GITS_CTLR);
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ctlr |= GITS_CTLR_ENABLE;
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its_write_u32(GITS_CTLR, ctlr);
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}
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struct its_cmd_block {
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union {
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u64 raw_cmd[4];
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__le64 raw_cmd_le[4];
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};
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};
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static inline void its_fixup_cmd(struct its_cmd_block *cmd)
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{
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/* Let's fixup BE commands */
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cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]);
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cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]);
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cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]);
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cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]);
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}
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static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l)
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{
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u64 mask = GENMASK_ULL(h, l);
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*raw_cmd &= ~mask;
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*raw_cmd |= (val << l) & mask;
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}
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static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr)
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{
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its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0);
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}
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static void its_encode_devid(struct its_cmd_block *cmd, u32 devid)
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{
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its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32);
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}
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static void its_encode_event_id(struct its_cmd_block *cmd, u32 id)
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{
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its_mask_encode(&cmd->raw_cmd[1], id, 31, 0);
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}
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static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id)
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{
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its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32);
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}
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static void its_encode_size(struct its_cmd_block *cmd, u8 size)
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{
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its_mask_encode(&cmd->raw_cmd[1], size, 4, 0);
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}
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static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr)
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{
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its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8);
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}
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static void its_encode_valid(struct its_cmd_block *cmd, int valid)
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{
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its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63);
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}
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static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr)
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{
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its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16);
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}
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static void its_encode_collection(struct its_cmd_block *cmd, u16 col)
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{
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its_mask_encode(&cmd->raw_cmd[2], col, 15, 0);
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}
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#define GITS_CMDQ_POLL_ITERATIONS 0
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static void its_send_cmd(void *cmdq_base, struct its_cmd_block *cmd)
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{
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u64 cwriter = its_read_u64(GITS_CWRITER);
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struct its_cmd_block *dst = cmdq_base + cwriter;
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u64 cbaser = its_read_u64(GITS_CBASER);
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size_t cmdq_size;
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u64 next;
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int i;
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cmdq_size = ((cbaser & 0xFF) + 1) * SZ_4K;
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its_fixup_cmd(cmd);
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WRITE_ONCE(*dst, *cmd);
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dsb(ishst);
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next = (cwriter + sizeof(*cmd)) % cmdq_size;
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its_write_u64(GITS_CWRITER, next);
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/*
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* Polling isn't necessary considering KVM's ITS emulation at the time
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* of writing this, as the CMDQ is processed synchronously after a write
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* to CWRITER.
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*/
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for (i = 0; its_read_u64(GITS_CREADR) != next; i++) {
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__GUEST_ASSERT(i < GITS_CMDQ_POLL_ITERATIONS,
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"ITS didn't process command at offset %lu after %d iterations\n",
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cwriter, i);
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cpu_relax();
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}
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}
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void its_send_mapd_cmd(void *cmdq_base, u32 device_id, vm_paddr_t itt_base,
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size_t itt_size, bool valid)
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{
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struct its_cmd_block cmd = {};
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its_encode_cmd(&cmd, GITS_CMD_MAPD);
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its_encode_devid(&cmd, device_id);
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its_encode_size(&cmd, ilog2(itt_size) - 1);
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its_encode_itt(&cmd, itt_base);
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its_encode_valid(&cmd, valid);
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its_send_cmd(cmdq_base, &cmd);
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}
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void its_send_mapc_cmd(void *cmdq_base, u32 vcpu_id, u32 collection_id, bool valid)
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{
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struct its_cmd_block cmd = {};
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its_encode_cmd(&cmd, GITS_CMD_MAPC);
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its_encode_collection(&cmd, collection_id);
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its_encode_target(&cmd, vcpu_id);
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its_encode_valid(&cmd, valid);
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its_send_cmd(cmdq_base, &cmd);
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}
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void its_send_mapti_cmd(void *cmdq_base, u32 device_id, u32 event_id,
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u32 collection_id, u32 intid)
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{
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struct its_cmd_block cmd = {};
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its_encode_cmd(&cmd, GITS_CMD_MAPTI);
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its_encode_devid(&cmd, device_id);
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its_encode_event_id(&cmd, event_id);
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its_encode_phys_id(&cmd, intid);
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its_encode_collection(&cmd, collection_id);
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its_send_cmd(cmdq_base, &cmd);
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}
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void its_send_invall_cmd(void *cmdq_base, u32 collection_id)
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{
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struct its_cmd_block cmd = {};
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its_encode_cmd(&cmd, GITS_CMD_INVALL);
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its_encode_collection(&cmd, collection_id);
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its_send_cmd(cmdq_base, &cmd);
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}

‎tools/testing/selftests/kvm/lib/aarch64/vgic.c

Lines changed: 18 additions & 0 deletions
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@@ -166,3 +166,21 @@ void kvm_irq_write_isactiver(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu)
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{
167167
vgic_poke_irq(gic_fd, intid, vcpu, GICD_ISACTIVER);
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}
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int vgic_its_setup(struct kvm_vm *vm)
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{
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int its_fd = kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_ITS);
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u64 attr;
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attr = GITS_BASE_GPA;
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kvm_device_attr_set(its_fd, KVM_DEV_ARM_VGIC_GRP_ADDR,
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KVM_VGIC_ITS_ADDR_TYPE, &attr);
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kvm_device_attr_set(its_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
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KVM_DEV_ARM_VGIC_CTRL_INIT, NULL);
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virt_map(vm, GITS_BASE_GPA, GITS_BASE_GPA,
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vm_calc_num_guest_pages(vm->mode, KVM_VGIC_V3_ITS_SIZE));
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return its_fd;
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}

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