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Alexandre Torgue
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ARM: dts: stm32: order stm32mp13-pinctrl nodes
Keep alphabetic order for pins definition nodes for a better read. Signed-off-by: Alexandre Torgue <[email protected]>
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‎arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi

Lines changed: 65 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,13 @@
1919
};
2020
};
2121

22+
adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 {
23+
pins {
24+
pinmux = <STM32_PINMUX('A', 5, ANALOG)>, /* ADC1_INP2 */
25+
<STM32_PINMUX('F', 13, ANALOG)>; /* ADC1_INP11 */
26+
};
27+
};
28+
2229
dcmipp_pins_a: dcmi-0 {
2330
pins1 {
2431
pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
@@ -52,35 +59,6 @@
5259
};
5360
};
5461

55-
goodix_pins_a: goodix-0 {
56-
/*
57-
* touchscreen reset needs to be configured
58-
* via the pinctrl not the driver (a pull-down resistor
59-
* has been soldered onto the reset line which forces
60-
* the touchscreen to reset state).
61-
*/
62-
pins1 {
63-
pinmux = <STM32_PINMUX('H', 2, GPIO)>;
64-
output-high;
65-
bias-pull-up;
66-
};
67-
/*
68-
* Interrupt line must have a pull-down resistor
69-
* in order to freeze the i2c address at 0x5D
70-
*/
71-
pins2 {
72-
pinmux = <STM32_PINMUX('F', 5, GPIO)>;
73-
bias-pull-down;
74-
};
75-
};
76-
77-
adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 {
78-
pins {
79-
pinmux = <STM32_PINMUX('A', 5, ANALOG)>, /* ADC1_INP2 */
80-
<STM32_PINMUX('F', 13, ANALOG)>; /* ADC1_INP11 */
81-
};
82-
};
83-
8462
eth1_rgmii_pins_a: eth1-rgmii-0 {
8563
pins1 {
8664
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
@@ -127,6 +105,42 @@
127105
};
128106
};
129107

108+
eth1_rmii_pins_a: eth1-rmii-0 {
109+
pins1 {
110+
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RMII_TXD0 */
111+
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RMII_TXD1 */
112+
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RMII_TX_EN */
113+
<STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */
114+
<STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
115+
<STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
116+
bias-disable;
117+
drive-push-pull;
118+
slew-rate = <1>;
119+
};
120+
121+
pins2 {
122+
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RMII_RXD0 */
123+
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RMII_RXD1 */
124+
<STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */
125+
bias-disable;
126+
};
127+
128+
};
129+
130+
eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 {
131+
pins1 {
132+
pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RMII_TXD0 */
133+
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RMII_TXD1 */
134+
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RMII_TX_EN */
135+
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */
136+
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
137+
<STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
138+
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RMII_RXD0 */
139+
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RMII_RXD1 */
140+
<STM32_PINMUX('C', 1, ANALOG)>; /* ETH_RMII_CRS_DV */
141+
};
142+
};
143+
130144
eth2_rgmii_pins_a: eth2-rgmii-0 {
131145
pins1 {
132146
pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RGMII_TXD0 */
@@ -172,42 +186,6 @@
172186
};
173187
};
174188

175-
eth1_rmii_pins_a: eth1-rmii-0 {
176-
pins1 {
177-
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RMII_TXD0 */
178-
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RMII_TXD1 */
179-
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RMII_TX_EN */
180-
<STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */
181-
<STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
182-
<STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
183-
bias-disable;
184-
drive-push-pull;
185-
slew-rate = <1>;
186-
};
187-
188-
pins2 {
189-
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RMII_RXD0 */
190-
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RMII_RXD1 */
191-
<STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */
192-
bias-disable;
193-
};
194-
195-
};
196-
197-
eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 {
198-
pins1 {
199-
pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RMII_TXD0 */
200-
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RMII_TXD1 */
201-
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RMII_TX_EN */
202-
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */
203-
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
204-
<STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
205-
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RMII_RXD0 */
206-
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RMII_RXD1 */
207-
<STM32_PINMUX('C', 1, ANALOG)>; /* ETH_RMII_CRS_DV */
208-
};
209-
};
210-
211189
eth2_rmii_pins_a: eth2-rmii-0 {
212190
pins1 {
213191
pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RMII_TXD0 */
@@ -243,6 +221,28 @@
243221
};
244222
};
245223

224+
goodix_pins_a: goodix-0 {
225+
/*
226+
* touchscreen reset needs to be configured
227+
* via the pinctrl not the driver (a pull-down resistor
228+
* has been soldered onto the reset line which forces
229+
* the touchscreen to reset state).
230+
*/
231+
pins1 {
232+
pinmux = <STM32_PINMUX('H', 2, GPIO)>;
233+
output-high;
234+
bias-pull-up;
235+
};
236+
/*
237+
* Interrupt line must have a pull-down resistor
238+
* in order to freeze the i2c address at 0x5D
239+
*/
240+
pins2 {
241+
pinmux = <STM32_PINMUX('F', 5, GPIO)>;
242+
bias-pull-down;
243+
};
244+
};
245+
246246
i2c1_pins_a: i2c1-0 {
247247
pins {
248248
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */

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