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MIPS: Fallback CPU -march flag to ISA level if unsupported
LLVM does not implement some of -march options. However those options are not mandatory for kernel to build for those CPUs. Fallback -march CFLAG to ISA level if unsupported by toolchain so we can get those kernel to build with LLVM. Link: ClangBuiltLinux#1544 Reported-by: Nathan Chancellor <[email protected]> Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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arch/mips/Makefile

Lines changed: 17 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -148,10 +148,10 @@ cflags-y += $(call cc-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
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#
149149
# CPU-dependent compiler/assembler options for optimization.
150150
#
151-
cflags-$(CONFIG_CPU_R3000) += -march=r3000
152-
cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
153-
cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
154-
cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
151+
cflags-$(CONFIG_CPU_R3000) += $(call cc-option,-march=r3000,-march=mips1)
152+
cflags-$(CONFIG_CPU_R4300) += $(call cc-option,-march=r4300,-march=mips3) -Wa,--trap
153+
cflags-$(CONFIG_CPU_R4X00) += $(call cc-option,-march=r4600,-march=mips3) -Wa,--trap
154+
cflags-$(CONFIG_CPU_TX49XX) += $(call cc-option,-march=r4600,-march=mips3) -Wa,--trap
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cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,--trap
156156
cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,--trap
157157
cflags-$(CONFIG_CPU_MIPS32_R5) += -march=mips32r5 -Wa,--trap -modd-spreg
@@ -160,26 +160,30 @@ cflags-$(CONFIG_CPU_MIPS64_R1) += -march=mips64 -Wa,--trap
160160
cflags-$(CONFIG_CPU_MIPS64_R2) += -march=mips64r2 -Wa,--trap
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cflags-$(CONFIG_CPU_MIPS64_R5) += -march=mips64r5 -Wa,--trap
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cflags-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,--trap
163-
cflags-$(CONFIG_CPU_P5600) += -march=p5600 -Wa,--trap -modd-spreg
164-
cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
165-
cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \
163+
cflags-$(CONFIG_CPU_P5600) += $(call cc-option,-march=p5600,-march=mips32r5) \
164+
-Wa,--trap -modd-spreg
165+
cflags-$(CONFIG_CPU_R5000) += $(call cc-option,-march=r5000,-march=mips4) \
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-Wa,--trap
167-
cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
167+
cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=mips4) \
168168
-Wa,--trap
169-
cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
169+
cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=mips4) \
170170
-Wa,--trap
171-
cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
171+
cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=mips4) \
172+
-Wa,--trap
173+
cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=mips64) \
172174
-Wa,--trap
173175
cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mdmx)
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cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mips3d)
175-
cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
177+
cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=mips4) \
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-Wa,--trap
177179
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -march=octeon -Wa,--trap
178180
cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
179181
cflags-$(CONFIG_CPU_BMIPS) += -march=mips32 -Wa,-mips32 -Wa,--trap
180182

181-
cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e -Wa,--trap
182-
cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f -Wa,--trap
183+
cflags-$(CONFIG_CPU_LOONGSON2E) += \
184+
$(call cc-option,-march=loongson2e,-march=mips3) -Wa,--trap
185+
cflags-$(CONFIG_CPU_LOONGSON2F) += \
186+
$(call cc-option,-march=loongson2f,-march=mips3) -Wa,--trap
183187
# Some -march= flags enable MMI instructions, and GCC complains about that
184188
# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
185189
cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call cc-option,-mno-loongson-mmi)

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