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lumagGeorgi Djakov
lumag
authored and
Georgi Djakov
committed
interconnect: qcom: sm8350: drop DISP nodes
The msm-5.x kernels have additional display RSC and separate display BCM voter. Since upstream kernel doesn't yet provide display RSC, we end up duplicating several nodes, which can result in incorrect votes being cast. Drop *_DISP nodes. Fixes: d26a566 ("interconnect: qcom: Add SM8350 interconnect provider driver") Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Georgi Djakov <[email protected]>
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‎drivers/interconnect/qcom/sm8350.c

Lines changed: 0 additions & 154 deletions
Original file line numberDiff line numberDiff line change
@@ -628,60 +628,6 @@ static struct qcom_icc_node xm_gic = {
628628
.links = { SM8350_SLAVE_SNOC_GEM_NOC_GC },
629629
};
630630

631-
static struct qcom_icc_node qnm_mnoc_hf_disp = {
632-
.name = "qnm_mnoc_hf_disp",
633-
.id = SM8350_MASTER_MNOC_HF_MEM_NOC_DISP,
634-
.channels = 2,
635-
.buswidth = 32,
636-
.num_links = 1,
637-
.links = { SM8350_SLAVE_LLCC_DISP },
638-
};
639-
640-
static struct qcom_icc_node qnm_mnoc_sf_disp = {
641-
.name = "qnm_mnoc_sf_disp",
642-
.id = SM8350_MASTER_MNOC_SF_MEM_NOC_DISP,
643-
.channels = 2,
644-
.buswidth = 32,
645-
.num_links = 1,
646-
.links = { SM8350_SLAVE_LLCC_DISP },
647-
};
648-
649-
static struct qcom_icc_node llcc_mc_disp = {
650-
.name = "llcc_mc_disp",
651-
.id = SM8350_MASTER_LLCC_DISP,
652-
.channels = 4,
653-
.buswidth = 4,
654-
.num_links = 1,
655-
.links = { SM8350_SLAVE_EBI1_DISP },
656-
};
657-
658-
static struct qcom_icc_node qxm_mdp0_disp = {
659-
.name = "qxm_mdp0_disp",
660-
.id = SM8350_MASTER_MDP0_DISP,
661-
.channels = 1,
662-
.buswidth = 32,
663-
.num_links = 1,
664-
.links = { SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP },
665-
};
666-
667-
static struct qcom_icc_node qxm_mdp1_disp = {
668-
.name = "qxm_mdp1_disp",
669-
.id = SM8350_MASTER_MDP1_DISP,
670-
.channels = 1,
671-
.buswidth = 32,
672-
.num_links = 1,
673-
.links = { SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP },
674-
};
675-
676-
static struct qcom_icc_node qxm_rot_disp = {
677-
.name = "qxm_rot_disp",
678-
.id = SM8350_MASTER_ROTATOR_DISP,
679-
.channels = 1,
680-
.buswidth = 32,
681-
.num_links = 1,
682-
.links = { SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP },
683-
};
684-
685631
static struct qcom_icc_node qns_a1noc_snoc = {
686632
.name = "qns_a1noc_snoc",
687633
.id = SM8350_SLAVE_A1NOC_SNOC,
@@ -1320,40 +1266,6 @@ static struct qcom_icc_node srvc_snoc = {
13201266
.buswidth = 4,
13211267
};
13221268

1323-
static struct qcom_icc_node qns_llcc_disp = {
1324-
.name = "qns_llcc_disp",
1325-
.id = SM8350_SLAVE_LLCC_DISP,
1326-
.channels = 4,
1327-
.buswidth = 16,
1328-
.num_links = 1,
1329-
.links = { SM8350_MASTER_LLCC_DISP },
1330-
};
1331-
1332-
static struct qcom_icc_node ebi_disp = {
1333-
.name = "ebi_disp",
1334-
.id = SM8350_SLAVE_EBI1_DISP,
1335-
.channels = 4,
1336-
.buswidth = 4,
1337-
};
1338-
1339-
static struct qcom_icc_node qns_mem_noc_hf_disp = {
1340-
.name = "qns_mem_noc_hf_disp",
1341-
.id = SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP,
1342-
.channels = 2,
1343-
.buswidth = 32,
1344-
.num_links = 1,
1345-
.links = { SM8350_MASTER_MNOC_HF_MEM_NOC_DISP },
1346-
};
1347-
1348-
static struct qcom_icc_node qns_mem_noc_sf_disp = {
1349-
.name = "qns_mem_noc_sf_disp",
1350-
.id = SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP,
1351-
.channels = 2,
1352-
.buswidth = 32,
1353-
.num_links = 1,
1354-
.links = { SM8350_MASTER_MNOC_SF_MEM_NOC_DISP },
1355-
};
1356-
13571269
static struct qcom_icc_bcm bcm_acv = {
13581270
.name = "ACV",
13591271
.enable_mask = BIT(3),
@@ -1583,55 +1495,6 @@ static struct qcom_icc_bcm bcm_sn14 = {
15831495
.nodes = { &qns_pcie_mem_noc },
15841496
};
15851497

1586-
static struct qcom_icc_bcm bcm_acv_disp = {
1587-
.name = "ACV",
1588-
.keepalive = false,
1589-
.num_nodes = 1,
1590-
.nodes = { &ebi_disp },
1591-
};
1592-
1593-
static struct qcom_icc_bcm bcm_mc0_disp = {
1594-
.name = "MC0",
1595-
.keepalive = false,
1596-
.num_nodes = 1,
1597-
.nodes = { &ebi_disp },
1598-
};
1599-
1600-
static struct qcom_icc_bcm bcm_mm0_disp = {
1601-
.name = "MM0",
1602-
.keepalive = false,
1603-
.num_nodes = 1,
1604-
.nodes = { &qns_mem_noc_hf_disp },
1605-
};
1606-
1607-
static struct qcom_icc_bcm bcm_mm1_disp = {
1608-
.name = "MM1",
1609-
.keepalive = false,
1610-
.num_nodes = 2,
1611-
.nodes = { &qxm_mdp0_disp, &qxm_mdp1_disp },
1612-
};
1613-
1614-
static struct qcom_icc_bcm bcm_mm4_disp = {
1615-
.name = "MM4",
1616-
.keepalive = false,
1617-
.num_nodes = 1,
1618-
.nodes = { &qns_mem_noc_sf_disp },
1619-
};
1620-
1621-
static struct qcom_icc_bcm bcm_mm5_disp = {
1622-
.name = "MM5",
1623-
.keepalive = false,
1624-
.num_nodes = 1,
1625-
.nodes = { &qxm_rot_disp },
1626-
};
1627-
1628-
static struct qcom_icc_bcm bcm_sh0_disp = {
1629-
.name = "SH0",
1630-
.keepalive = false,
1631-
.num_nodes = 1,
1632-
.nodes = { &qns_llcc_disp },
1633-
};
1634-
16351498
static struct qcom_icc_bcm * const aggre1_noc_bcms[] = {
16361499
};
16371500

@@ -1785,7 +1648,6 @@ static struct qcom_icc_bcm * const gem_noc_bcms[] = {
17851648
&bcm_sh2,
17861649
&bcm_sh3,
17871650
&bcm_sh4,
1788-
&bcm_sh0_disp,
17891651
};
17901652

17911653
static struct qcom_icc_node * const gem_noc_nodes[] = {
@@ -1808,9 +1670,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = {
18081670
[SLAVE_SERVICE_GEM_NOC_1] = &srvc_even_gemnoc,
18091671
[SLAVE_SERVICE_GEM_NOC_2] = &srvc_odd_gemnoc,
18101672
[SLAVE_SERVICE_GEM_NOC] = &srvc_sys_gemnoc,
1811-
[MASTER_MNOC_HF_MEM_NOC_DISP] = &qnm_mnoc_hf_disp,
1812-
[MASTER_MNOC_SF_MEM_NOC_DISP] = &qnm_mnoc_sf_disp,
1813-
[SLAVE_LLCC_DISP] = &qns_llcc_disp,
18141673
};
18151674

18161675
static const struct qcom_icc_desc sm8350_gem_noc = {
@@ -1843,15 +1702,11 @@ static const struct qcom_icc_desc sm8350_lpass_ag_noc = {
18431702
static struct qcom_icc_bcm * const mc_virt_bcms[] = {
18441703
&bcm_acv,
18451704
&bcm_mc0,
1846-
&bcm_acv_disp,
1847-
&bcm_mc0_disp,
18481705
};
18491706

18501707
static struct qcom_icc_node * const mc_virt_nodes[] = {
18511708
[MASTER_LLCC] = &llcc_mc,
18521709
[SLAVE_EBI1] = &ebi,
1853-
[MASTER_LLCC_DISP] = &llcc_mc_disp,
1854-
[SLAVE_EBI1_DISP] = &ebi_disp,
18551710
};
18561711

18571712
static const struct qcom_icc_desc sm8350_mc_virt = {
@@ -1866,10 +1721,6 @@ static struct qcom_icc_bcm * const mmss_noc_bcms[] = {
18661721
&bcm_mm1,
18671722
&bcm_mm4,
18681723
&bcm_mm5,
1869-
&bcm_mm0_disp,
1870-
&bcm_mm1_disp,
1871-
&bcm_mm4_disp,
1872-
&bcm_mm5_disp,
18731724
};
18741725

18751726
static struct qcom_icc_node * const mmss_noc_nodes[] = {
@@ -1886,11 +1737,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = {
18861737
[SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf,
18871738
[SLAVE_MNOC_SF_MEM_NOC] = &qns_mem_noc_sf,
18881739
[SLAVE_SERVICE_MNOC] = &srvc_mnoc,
1889-
[MASTER_MDP0_DISP] = &qxm_mdp0_disp,
1890-
[MASTER_MDP1_DISP] = &qxm_mdp1_disp,
1891-
[MASTER_ROTATOR_DISP] = &qxm_rot_disp,
1892-
[SLAVE_MNOC_HF_MEM_NOC_DISP] = &qns_mem_noc_hf_disp,
1893-
[SLAVE_MNOC_SF_MEM_NOC_DISP] = &qns_mem_noc_sf_disp,
18941740
};
18951741

18961742
static const struct qcom_icc_desc sm8350_mmss_noc = {

‎drivers/interconnect/qcom/sm8350.h

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -154,15 +154,5 @@
154154
#define SM8350_SLAVE_PCIE_1 143
155155
#define SM8350_SLAVE_QDSS_STM 144
156156
#define SM8350_SLAVE_TCU 145
157-
#define SM8350_MASTER_LLCC_DISP 146
158-
#define SM8350_MASTER_MNOC_HF_MEM_NOC_DISP 147
159-
#define SM8350_MASTER_MNOC_SF_MEM_NOC_DISP 148
160-
#define SM8350_MASTER_MDP0_DISP 149
161-
#define SM8350_MASTER_MDP1_DISP 150
162-
#define SM8350_MASTER_ROTATOR_DISP 151
163-
#define SM8350_SLAVE_EBI1_DISP 152
164-
#define SM8350_SLAVE_LLCC_DISP 153
165-
#define SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP 154
166-
#define SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP 155
167157

168158
#endif

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