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dt-bindings: display: sun6i-dsi: Add the A100 variant
The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the same register layout as previous SoC integrations. However, its module clock now comes from the TCON, which means it no longer runs at a fixed rate, so this needs to be distinguished in the driver. The controller also now uses pins on Port D instead of dedicated pins, so it drops the separate power domain. Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
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Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml

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properties:
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compatible:
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enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a64-mipi-dsi
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oneOf:
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- enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a64-mipi-dsi
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- allwinner,sun50i-a100-mipi-dsi
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- items:
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- const: allwinner,sun20i-d1-mipi-dsi
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- const: allwinner,sun50i-a100-mipi-dsi
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reg:
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maxItems: 1
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- phys
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- phy-names
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- resets
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- vcc-dsi-supply
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- port
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allOf:
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properties:
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compatible:
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contains:
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const: allwinner,sun6i-a31-mipi-dsi
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enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a100-mipi-dsi
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then:
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properties:
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clocks:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- allwinner,sun6i-a31-mipi-dsi
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- allwinner,sun50i-a64-mipi-dsi
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then:
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required:
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- vcc-dsi-supply
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unevaluatedProperties: false
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examples:

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