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Merge tag 'drm-next-5.5-2019-11-15' of git://people.freedesktop.org/~agd5f/linux into drm-next
drm-next-5.5-2019-11-15: amdgpu: - Fix AVFS handling on SMU7 parts with custom power tables - Enable Overdrive sysfs interface for Navi parts - Fix power limit handling on smu11 parts - Fix pcie link sysfs output for Navi - Probably cancel MM worker threads on shutdown radeon: - Cleanup for ppc change Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 17cc513 + 622b2a0 commit c22fe76

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16 files changed

+493
-39
lines changed

16 files changed

+493
-39
lines changed

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3110,6 +3110,9 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
31103110

31113111
DRM_INFO("amdgpu: finishing device.\n");
31123112
adev->shutdown = true;
3113+
3114+
flush_delayed_work(&adev->delayed_init_work);
3115+
31133116
/* disable all interrupts */
31143117
amdgpu_irq_disable_all(adev);
31153118
if (adev->mode_info.mode_config_initialized){

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -567,7 +567,9 @@ static int psp_xgmi_initialize(struct psp_context *psp)
567567
struct ta_xgmi_shared_memory *xgmi_cmd;
568568
int ret;
569569

570-
if (!psp->adev->psp.ta_fw)
570+
if (!psp->adev->psp.ta_fw ||
571+
!psp->adev->psp.ta_xgmi_ucode_size ||
572+
!psp->adev->psp.ta_xgmi_start_addr)
571573
return -ENOENT;
572574

573575
if (!psp->xgmi_context.initialized) {
@@ -777,6 +779,12 @@ static int psp_ras_initialize(struct psp_context *psp)
777779
{
778780
int ret;
779781

782+
if (!psp->adev->psp.ta_ras_ucode_size ||
783+
!psp->adev->psp.ta_ras_start_addr) {
784+
dev_warn(psp->adev->dev, "RAS: ras ta ucode is not available\n");
785+
return 0;
786+
}
787+
780788
if (!psp->ras.ras_initialized) {
781789
ret = psp_ras_init_shared_buf(psp);
782790
if (ret)
@@ -866,6 +874,12 @@ static int psp_hdcp_initialize(struct psp_context *psp)
866874
{
867875
int ret;
868876

877+
if (!psp->adev->psp.ta_hdcp_ucode_size ||
878+
!psp->adev->psp.ta_hdcp_start_addr) {
879+
dev_warn(psp->adev->dev, "HDCP: hdcp ta ucode is not available\n");
880+
return 0;
881+
}
882+
869883
if (!psp->hdcp_context.hdcp_initialized) {
870884
ret = psp_hdcp_init_shared_buf(psp);
871885
if (ret)
@@ -1039,6 +1053,12 @@ static int psp_dtm_initialize(struct psp_context *psp)
10391053
{
10401054
int ret;
10411055

1056+
if (!psp->adev->psp.ta_dtm_ucode_size ||
1057+
!psp->adev->psp.ta_dtm_start_addr) {
1058+
dev_warn(psp->adev->dev, "DTM: dtm ta ucode is not available\n");
1059+
return 0;
1060+
}
1061+
10421062
if (!psp->dtm_context.dtm_initialized) {
10431063
ret = psp_dtm_init_shared_buf(psp);
10441064
if (ret)

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -299,6 +299,7 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev)
299299
{
300300
int i, j;
301301

302+
cancel_delayed_work_sync(&adev->uvd.idle_work);
302303
drm_sched_entity_destroy(&adev->uvd.entity);
303304

304305
for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -216,6 +216,7 @@ int amdgpu_vce_sw_fini(struct amdgpu_device *adev)
216216
if (adev->vce.vcpu_bo == NULL)
217217
return 0;
218218

219+
cancel_delayed_work_sync(&adev->vce.idle_work);
219220
drm_sched_entity_destroy(&adev->vce.entity);
220221

221222
amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr,

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -193,6 +193,8 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
193193
{
194194
int i, j;
195195

196+
cancel_delayed_work_sync(&adev->vcn.idle_work);
197+
196198
if (adev->vcn.indirect_sram) {
197199
amdgpu_bo_free_kernel(&adev->vcn.dpg_sram_bo,
198200
&adev->vcn.dpg_sram_gpu_addr,

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

Lines changed: 17 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1068,10 +1068,6 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
10681068
return ret;
10691069

10701070
if (adev->asic_type != CHIP_ARCTURUS) {
1071-
ret = smu_override_pcie_parameters(smu);
1072-
if (ret)
1073-
return ret;
1074-
10751071
ret = smu_notify_display_change(smu);
10761072
if (ret)
10771073
return ret;
@@ -1100,6 +1096,12 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
11001096
return ret;
11011097
}
11021098

1099+
if (adev->asic_type != CHIP_ARCTURUS) {
1100+
ret = smu_override_pcie_parameters(smu);
1101+
if (ret)
1102+
return ret;
1103+
}
1104+
11031105
ret = smu_set_default_od_settings(smu, initialize);
11041106
if (ret)
11051107
return ret;
@@ -1109,7 +1111,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
11091111
if (ret)
11101112
return ret;
11111113

1112-
ret = smu_get_power_limit(smu, &smu->default_power_limit, true, false);
1114+
ret = smu_get_power_limit(smu, &smu->default_power_limit, false, false);
11131115
if (ret)
11141116
return ret;
11151117
}
@@ -2511,3 +2513,13 @@ int smu_get_dpm_clock_table(struct smu_context *smu,
25112513

25122514
return ret;
25132515
}
2516+
2517+
uint32_t smu_get_pptable_power_limit(struct smu_context *smu)
2518+
{
2519+
uint32_t ret = 0;
2520+
2521+
if (smu->ppt_funcs->get_pptable_power_limit)
2522+
ret = smu->ppt_funcs->get_pptable_power_limit(smu);
2523+
2524+
return ret;
2525+
}

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1261,15 +1261,14 @@ arcturus_get_profiling_clk_mask(struct smu_context *smu,
12611261

12621262
static int arcturus_get_power_limit(struct smu_context *smu,
12631263
uint32_t *limit,
1264-
bool asic_default)
1264+
bool cap)
12651265
{
12661266
PPTable_t *pptable = smu->smu_table.driver_pptable;
12671267
uint32_t asic_default_power_limit = 0;
12681268
int ret = 0;
12691269
int power_src;
12701270

1271-
if (!smu->default_power_limit ||
1272-
!smu->power_limit) {
1271+
if (!smu->power_limit) {
12731272
if (smu_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) {
12741273
power_src = smu_power_get_index(smu, SMU_POWER_SOURCE_AC);
12751274
if (power_src < 0)
@@ -1292,17 +1291,11 @@ static int arcturus_get_power_limit(struct smu_context *smu,
12921291
pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0];
12931292
}
12941293

1295-
if (smu->od_enabled) {
1296-
asic_default_power_limit *= (100 + smu->smu_table.TDPODLimit);
1297-
asic_default_power_limit /= 100;
1298-
}
1299-
1300-
smu->default_power_limit = asic_default_power_limit;
13011294
smu->power_limit = asic_default_power_limit;
13021295
}
13031296

1304-
if (asic_default)
1305-
*limit = smu->default_power_limit;
1297+
if (cap)
1298+
*limit = smu_v11_0_get_max_power_limit(smu);
13061299
else
13071300
*limit = smu->power_limit;
13081301

@@ -2070,6 +2063,13 @@ static void arcturus_i2c_eeprom_control_fini(struct i2c_adapter *control)
20702063
i2c_del_adapter(control);
20712064
}
20722065

2066+
static uint32_t arcturus_get_pptable_power_limit(struct smu_context *smu)
2067+
{
2068+
PPTable_t *pptable = smu->smu_table.driver_pptable;
2069+
2070+
return pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0];
2071+
}
2072+
20732073
static const struct pptable_funcs arcturus_ppt_funcs = {
20742074
/* translate smu index into arcturus specific index */
20752075
.get_smu_msg_index = arcturus_get_smu_msg_index,
@@ -2160,6 +2160,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
21602160
.get_dpm_ultimate_freq = smu_v11_0_get_dpm_ultimate_freq,
21612161
.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
21622162
.override_pcie_parameters = smu_v11_0_override_pcie_parameters,
2163+
.get_pptable_power_limit = arcturus_get_pptable_power_limit,
21632164
};
21642165

21652166
void arcturus_set_ppt_funcs(struct smu_context *smu)

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3969,6 +3969,13 @@ static int smu7_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input)
39693969
"Failed to populate and upload SCLK MCLK DPM levels!",
39703970
result = tmp_result);
39713971

3972+
/*
3973+
* If a custom pp table is loaded, set DPMTABLE_OD_UPDATE_VDDC flag.
3974+
* That effectively disables AVFS feature.
3975+
*/
3976+
if (hwmgr->hardcode_pp_table != NULL)
3977+
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC;
3978+
39723979
tmp_result = smu7_update_avfs(hwmgr);
39733980
PP_ASSERT_WITH_CODE((0 == tmp_result),
39743981
"Failed to update avfs voltages!",

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,6 @@ struct smu_table_context
261261
struct smu_table *tables;
262262
struct smu_table memory_pool;
263263
uint8_t thermal_controller_type;
264-
uint16_t TDPODLimit;
265264

266265
void *overdrive_table;
267266
};
@@ -548,6 +547,7 @@ struct pptable_funcs {
548547
int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max);
549548
int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max);
550549
int (*override_pcie_parameters)(struct smu_context *smu);
550+
uint32_t (*get_pptable_power_limit)(struct smu_context *smu);
551551
};
552552

553553
int smu_load_microcode(struct smu_context *smu);
@@ -717,4 +717,6 @@ int smu_get_uclk_dpm_states(struct smu_context *smu,
717717
int smu_get_dpm_clock_table(struct smu_context *smu,
718718
struct dpm_clocks *clock_table);
719719

720+
uint32_t smu_get_pptable_power_limit(struct smu_context *smu);
721+
720722
#endif

drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,8 @@
4848

4949
#define SMU11_TOOL_SIZE 0x19000
5050

51+
#define MAX_PCIE_CONF 2
52+
5153
#define CLK_MAP(clk, index) \
5254
[SMU_##clk] = {1, (index)}
5355

@@ -88,6 +90,11 @@ struct smu_11_0_dpm_table {
8890
uint32_t max; /* MHz */
8991
};
9092

93+
struct smu_11_0_pcie_table {
94+
uint8_t pcie_gen[MAX_PCIE_CONF];
95+
uint8_t pcie_lane[MAX_PCIE_CONF];
96+
};
97+
9198
struct smu_11_0_dpm_tables {
9299
struct smu_11_0_dpm_table soc_table;
93100
struct smu_11_0_dpm_table gfx_table;
@@ -100,6 +107,7 @@ struct smu_11_0_dpm_tables {
100107
struct smu_11_0_dpm_table display_table;
101108
struct smu_11_0_dpm_table phy_table;
102109
struct smu_11_0_dpm_table fclk_table;
110+
struct smu_11_0_pcie_table pcie_table;
103111
};
104112

105113
struct smu_11_0_dpm_context {
@@ -250,4 +258,8 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_
250258

251259
int smu_v11_0_override_pcie_parameters(struct smu_context *smu);
252260

261+
int smu_v11_0_set_default_od_settings(struct smu_context *smu, bool initialize, size_t overdrive_table_size);
262+
263+
uint32_t smu_v11_0_get_max_power_limit(struct smu_context *smu);
264+
253265
#endif

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