@@ -669,17 +669,13 @@ static void rps_set_power(struct intel_rps *rps, int new_power)
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{
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struct intel_gt * gt = rps_to_gt (rps );
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struct intel_uncore * uncore = gt -> uncore ;
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- u32 threshold_up = 0 , threshold_down = 0 ; /* in % */
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u32 ei_up = 0 , ei_down = 0 ;
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lockdep_assert_held (& rps -> power .mutex );
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if (new_power == rps -> power .mode )
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return ;
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- threshold_up = 95 ;
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- threshold_down = 85 ;
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-
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/* Note the units here are not exactly 1us, but 1280ns. */
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switch (new_power ) {
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case LOW_POWER :
@@ -706,17 +702,22 @@ static void rps_set_power(struct intel_rps *rps, int new_power)
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GT_TRACE (gt ,
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"changing power mode [%d], up %d%% @ %dus, down %d%% @ %dus\n" ,
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- new_power , threshold_up , ei_up , threshold_down , ei_down );
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+ new_power ,
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+ rps -> power .up_threshold , ei_up ,
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+ rps -> power .down_threshold , ei_down );
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set (uncore , GEN6_RP_UP_EI ,
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intel_gt_ns_to_pm_interval (gt , ei_up * 1000 ));
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set (uncore , GEN6_RP_UP_THRESHOLD ,
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- intel_gt_ns_to_pm_interval (gt , ei_up * threshold_up * 10 ));
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+ intel_gt_ns_to_pm_interval (gt ,
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+ ei_up * rps -> power .up_threshold * 10 ));
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set (uncore , GEN6_RP_DOWN_EI ,
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intel_gt_ns_to_pm_interval (gt , ei_down * 1000 ));
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set (uncore , GEN6_RP_DOWN_THRESHOLD ,
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- intel_gt_ns_to_pm_interval (gt , ei_down * threshold_down * 10 ));
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+ intel_gt_ns_to_pm_interval (gt ,
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+ ei_down *
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+ rps -> power .down_threshold * 10 ));
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set (uncore , GEN6_RP_CONTROL ,
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(GRAPHICS_VER (gt -> i915 ) > 9 ? 0 : GEN6_RP_MEDIA_TURBO ) |
@@ -728,8 +729,6 @@ static void rps_set_power(struct intel_rps *rps, int new_power)
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skip_hw_write :
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rps -> power .mode = new_power ;
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- rps -> power .up_threshold = threshold_up ;
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- rps -> power .down_threshold = threshold_down ;
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}
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static void gen6_rps_set_thresholds (struct intel_rps * rps , u8 val )
@@ -1555,10 +1554,12 @@ void intel_rps_enable(struct intel_rps *rps)
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return ;
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GT_TRACE (rps_to_gt (rps ),
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- "min:%x, max:%x, freq:[%d, %d]\n" ,
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+ "min:%x, max:%x, freq:[%d, %d], thresholds:[%u, %u] \n" ,
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rps -> min_freq , rps -> max_freq ,
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intel_gpu_freq (rps , rps -> min_freq ),
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- intel_gpu_freq (rps , rps -> max_freq ));
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+ intel_gpu_freq (rps , rps -> max_freq ),
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+ rps -> power .up_threshold ,
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+ rps -> power .down_threshold );
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GEM_BUG_ON (rps -> max_freq < rps -> min_freq );
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GEM_BUG_ON (rps -> idle_freq > rps -> max_freq );
@@ -2011,6 +2012,10 @@ void intel_rps_init(struct intel_rps *rps)
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}
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}
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+ /* Set default thresholds in % */
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+ rps -> power .up_threshold = 95 ;
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+ rps -> power .down_threshold = 85 ;
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+
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/* Finally allow us to boost to max by default */
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rps -> boost_freq = rps -> max_freq ;
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rps -> idle_freq = rps -> min_freq ;
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