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sanirban-999anshuma1
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drm/i915/selftests: Refactor RC6 power measurement and error handling
Revise the power measurement logic to save and evaluate energy values. Previously, the test only checked whether the system had entered the RC6 state, without considering any potential interruptions in that state. This update introduces a threshold check to ensure that the GPU remains in the RC6 state properly during the specified sleep duration. v3: - Reorder threshold check (Badal) v4: - Improved commit message (Anshuman) v5: - Rename variables for improved readability (Anshuman) Signed-off-by: Sk Anirban <[email protected]> Reviewed-by: Badal Nilawar <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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drivers/gpu/drm/i915/gt/selftest_rc6.c

Lines changed: 35 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -33,15 +33,22 @@ int live_rc6_manual(void *arg)
3333
{
3434
struct intel_gt *gt = arg;
3535
struct intel_rc6 *rc6 = &gt->rc6;
36-
u64 rc0_power, rc6_power;
36+
struct intel_rps *rps = &gt->rps;
3737
intel_wakeref_t wakeref;
38+
u64 rc0_sample_energy[2];
39+
u64 rc6_sample_energy[2];
40+
u64 sleep_time = 1000;
41+
u32 rc0_freq = 0;
42+
u32 rc6_freq = 0;
43+
u64 rc0_power;
44+
u64 rc6_power;
3845
bool has_power;
46+
u64 threshold;
3947
ktime_t dt;
4048
u64 res[2];
4149
int err = 0;
42-
u32 rc0_freq = 0;
43-
u32 rc6_freq = 0;
44-
struct intel_rps *rps = &gt->rps;
50+
u64 diff;
51+
4552

4653
/*
4754
* Our claim is that we can "encourage" the GPU to enter rc6 at will.
@@ -66,9 +73,9 @@ int live_rc6_manual(void *arg)
6673
res[0] = rc6_residency(rc6);
6774

6875
dt = ktime_get();
69-
rc0_power = librapl_energy_uJ();
70-
msleep(1000);
71-
rc0_power = librapl_energy_uJ() - rc0_power;
76+
rc0_sample_energy[0] = librapl_energy_uJ();
77+
msleep(sleep_time);
78+
rc0_sample_energy[1] = librapl_energy_uJ() - rc0_sample_energy[0];
7279
dt = ktime_sub(ktime_get(), dt);
7380
res[1] = rc6_residency(rc6);
7481
rc0_freq = intel_rps_read_actual_frequency_fw(rps);
@@ -80,11 +87,12 @@ int live_rc6_manual(void *arg)
8087
}
8188

8289
if (has_power) {
83-
rc0_power = div64_u64(NSEC_PER_SEC * rc0_power,
90+
rc0_power = div64_u64(NSEC_PER_SEC * rc0_sample_energy[1],
8491
ktime_to_ns(dt));
92+
8593
if (!rc0_power) {
8694
if (rc0_freq)
87-
pr_debug("No power measured while in RC0! GPU Freq: %u in RC0\n",
95+
pr_debug("No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
8896
rc0_freq);
8997
else
9098
pr_err("No power and freq measured while in RC0\n");
@@ -99,10 +107,10 @@ int live_rc6_manual(void *arg)
99107
res[0] = rc6_residency(rc6);
100108
intel_uncore_forcewake_flush(rc6_to_uncore(rc6), FORCEWAKE_ALL);
101109
dt = ktime_get();
102-
rc6_power = librapl_energy_uJ();
103-
msleep(1000);
110+
rc6_sample_energy[0] = librapl_energy_uJ();
111+
msleep(sleep_time);
104112
rc6_freq = intel_rps_read_actual_frequency_fw(rps);
105-
rc6_power = librapl_energy_uJ() - rc6_power;
113+
rc6_sample_energy[1] = librapl_energy_uJ() - rc6_sample_energy[0];
106114
dt = ktime_sub(ktime_get(), dt);
107115
res[1] = rc6_residency(rc6);
108116
if (res[1] == res[0]) {
@@ -114,13 +122,24 @@ int live_rc6_manual(void *arg)
114122
}
115123

116124
if (has_power) {
117-
rc6_power = div64_u64(NSEC_PER_SEC * rc6_power,
125+
rc6_power = div64_u64(NSEC_PER_SEC * rc6_sample_energy[1],
118126
ktime_to_ns(dt));
119-
pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n",
127+
pr_info("GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
120128
rc0_power, rc6_power);
129+
121130
if (2 * rc6_power > rc0_power) {
122-
pr_err("GPU leaked energy while in RC6! GPU Freq: %u in RC6 and %u in RC0\n",
123-
rc6_freq, rc0_freq);
131+
pr_err("GPU leaked energy while in RC6!\n"
132+
"GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
133+
"RC0 energy before & after sleep respectively: %lluuJ %lluuJ\n"
134+
"RC6 energy before & after sleep respectively: %lluuJ %lluuJ\n",
135+
rc6_freq, rc0_freq, rc0_sample_energy[0], rc0_sample_energy[1],
136+
rc6_sample_energy[0], rc6_sample_energy[1]);
137+
138+
diff = res[1] - res[0];
139+
threshold = (9 * NSEC_PER_MSEC * sleep_time) / 10;
140+
if (diff < threshold)
141+
pr_err("Did not enter RC6 properly, RC6 start residency=%lluns, RC6 end residency=%lluns\n",
142+
res[0], res[1]);
124143
err = -EINVAL;
125144
goto out_unlock;
126145
}

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