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LuBaolujoergroedel
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iommu/vt-d: Remove domain_update_iommu_cap()
The attributes of a paging domain are initialized during the allocation process, and any attempt to attach a domain that is not compatible will result in a failure. Therefore, there is no need to update the domain attributes at the time of domain attachment. Signed-off-by: Lu Baolu <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/intel/iommu.c

Lines changed: 0 additions & 83 deletions
Original file line numberDiff line numberDiff line change
@@ -352,36 +352,6 @@ static bool iommu_paging_structure_coherency(struct intel_iommu *iommu)
352352
ecap_smpwc(iommu->ecap) : ecap_coherent(iommu->ecap);
353353
}
354354

355-
static void domain_update_iommu_coherency(struct dmar_domain *domain)
356-
{
357-
struct iommu_domain_info *info;
358-
struct dmar_drhd_unit *drhd;
359-
struct intel_iommu *iommu;
360-
bool found = false;
361-
unsigned long i;
362-
363-
domain->iommu_coherency = true;
364-
xa_for_each(&domain->iommu_array, i, info) {
365-
found = true;
366-
if (!iommu_paging_structure_coherency(info->iommu)) {
367-
domain->iommu_coherency = false;
368-
break;
369-
}
370-
}
371-
if (found)
372-
return;
373-
374-
/* No hardware attached; use lowest common denominator */
375-
rcu_read_lock();
376-
for_each_active_iommu(iommu, drhd) {
377-
if (!iommu_paging_structure_coherency(iommu)) {
378-
domain->iommu_coherency = false;
379-
break;
380-
}
381-
}
382-
rcu_read_unlock();
383-
}
384-
385355
static int domain_update_iommu_superpage(struct dmar_domain *domain,
386356
struct intel_iommu *skip)
387357
{
@@ -412,29 +382,6 @@ static int domain_update_iommu_superpage(struct dmar_domain *domain,
412382
return fls(mask);
413383
}
414384

415-
static int domain_update_device_node(struct dmar_domain *domain)
416-
{
417-
struct device_domain_info *info;
418-
int nid = NUMA_NO_NODE;
419-
unsigned long flags;
420-
421-
spin_lock_irqsave(&domain->lock, flags);
422-
list_for_each_entry(info, &domain->devices, link) {
423-
/*
424-
* There could possibly be multiple device numa nodes as devices
425-
* within the same domain may sit behind different IOMMUs. There
426-
* isn't perfect answer in such situation, so we select first
427-
* come first served policy.
428-
*/
429-
nid = dev_to_node(info->dev);
430-
if (nid != NUMA_NO_NODE)
431-
break;
432-
}
433-
spin_unlock_irqrestore(&domain->lock, flags);
434-
435-
return nid;
436-
}
437-
438385
/* Return the super pagesize bitmap if supported. */
439386
static unsigned long domain_super_pgsize_bitmap(struct dmar_domain *domain)
440387
{
@@ -452,34 +399,6 @@ static unsigned long domain_super_pgsize_bitmap(struct dmar_domain *domain)
452399
return bitmap;
453400
}
454401

455-
/* Some capabilities may be different across iommus */
456-
void domain_update_iommu_cap(struct dmar_domain *domain)
457-
{
458-
domain_update_iommu_coherency(domain);
459-
domain->iommu_superpage = domain_update_iommu_superpage(domain, NULL);
460-
461-
/*
462-
* If RHSA is missing, we should default to the device numa domain
463-
* as fall back.
464-
*/
465-
if (domain->nid == NUMA_NO_NODE)
466-
domain->nid = domain_update_device_node(domain);
467-
468-
/*
469-
* First-level translation restricts the input-address to a
470-
* canonical address (i.e., address bits 63:N have the same
471-
* value as address bit [N-1], where N is 48-bits with 4-level
472-
* paging and 57-bits with 5-level paging). Hence, skip bit
473-
* [N-1].
474-
*/
475-
if (domain->use_first_level)
476-
domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw - 1);
477-
else
478-
domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw);
479-
480-
domain->domain.pgsize_bitmap |= domain_super_pgsize_bitmap(domain);
481-
}
482-
483402
struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
484403
u8 devfn, int alloc)
485404
{
@@ -1493,7 +1412,6 @@ int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu)
14931412
ret = xa_err(curr) ? : -EBUSY;
14941413
goto err_clear;
14951414
}
1496-
domain_update_iommu_cap(domain);
14971415

14981416
spin_unlock(&iommu->lock);
14991417
return 0;
@@ -1519,7 +1437,6 @@ void domain_detach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu)
15191437
clear_bit(info->did, iommu->domain_ids);
15201438
xa_erase(&domain->iommu_array, iommu->seq_id);
15211439
domain->nid = NUMA_NO_NODE;
1522-
domain_update_iommu_cap(domain);
15231440
kfree(info);
15241441
}
15251442
spin_unlock(&iommu->lock);

drivers/iommu/intel/iommu.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1231,7 +1231,6 @@ int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu);
12311231
void domain_detach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu);
12321232
void device_block_translation(struct device *dev);
12331233
int paging_domain_compatible(struct iommu_domain *domain, struct device *dev);
1234-
void domain_update_iommu_cap(struct dmar_domain *domain);
12351234

12361235
int dmar_ir_support(void);
12371236

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