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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
| 2 | +/* |
| 3 | + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. |
| 4 | + */ |
| 5 | + |
| 6 | +#include <linux/firmware/qcom/qcom_scm.h> |
| 7 | +#include <linux/mod_devicetable.h> |
| 8 | +#include <linux/nvmem-provider.h> |
| 9 | +#include <linux/platform_device.h> |
| 10 | +#include <linux/pm_runtime.h> |
| 11 | + |
| 12 | +/** |
| 13 | + * struct sec_qfprom - structure holding secure qfprom attributes |
| 14 | + * |
| 15 | + * @base: starting physical address for secure qfprom corrected address space. |
| 16 | + * @dev: qfprom device structure. |
| 17 | + */ |
| 18 | +struct sec_qfprom { |
| 19 | + phys_addr_t base; |
| 20 | + struct device *dev; |
| 21 | +}; |
| 22 | + |
| 23 | +static int sec_qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) |
| 24 | +{ |
| 25 | + struct sec_qfprom *priv = context; |
| 26 | + unsigned int i; |
| 27 | + u8 *val = _val; |
| 28 | + u32 read_val; |
| 29 | + u8 *tmp; |
| 30 | + |
| 31 | + for (i = 0; i < bytes; i++, reg++) { |
| 32 | + if (i == 0 || reg % 4 == 0) { |
| 33 | + if (qcom_scm_io_readl(priv->base + (reg & ~3), &read_val)) { |
| 34 | + dev_err(priv->dev, "Couldn't access fuse register\n"); |
| 35 | + return -EINVAL; |
| 36 | + } |
| 37 | + tmp = (u8 *)&read_val; |
| 38 | + } |
| 39 | + |
| 40 | + val[i] = tmp[reg & 3]; |
| 41 | + } |
| 42 | + |
| 43 | + return 0; |
| 44 | +} |
| 45 | + |
| 46 | +static int sec_qfprom_probe(struct platform_device *pdev) |
| 47 | +{ |
| 48 | + struct nvmem_config econfig = { |
| 49 | + .name = "sec-qfprom", |
| 50 | + .stride = 1, |
| 51 | + .word_size = 1, |
| 52 | + .id = NVMEM_DEVID_AUTO, |
| 53 | + .reg_read = sec_qfprom_reg_read, |
| 54 | + }; |
| 55 | + struct device *dev = &pdev->dev; |
| 56 | + struct nvmem_device *nvmem; |
| 57 | + struct sec_qfprom *priv; |
| 58 | + struct resource *res; |
| 59 | + |
| 60 | + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
| 61 | + if (!priv) |
| 62 | + return -ENOMEM; |
| 63 | + |
| 64 | + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 65 | + if (!res) |
| 66 | + return -EINVAL; |
| 67 | + |
| 68 | + priv->base = res->start; |
| 69 | + |
| 70 | + econfig.size = resource_size(res); |
| 71 | + econfig.dev = dev; |
| 72 | + econfig.priv = priv; |
| 73 | + |
| 74 | + priv->dev = dev; |
| 75 | + |
| 76 | + nvmem = devm_nvmem_register(dev, &econfig); |
| 77 | + |
| 78 | + return PTR_ERR_OR_ZERO(nvmem); |
| 79 | +} |
| 80 | + |
| 81 | +static const struct of_device_id sec_qfprom_of_match[] = { |
| 82 | + { .compatible = "qcom,sec-qfprom" }, |
| 83 | + {/* sentinel */}, |
| 84 | +}; |
| 85 | +MODULE_DEVICE_TABLE(of, sec_qfprom_of_match); |
| 86 | + |
| 87 | +static struct platform_driver qfprom_driver = { |
| 88 | + .probe = sec_qfprom_probe, |
| 89 | + .driver = { |
| 90 | + .name = "qcom_sec_qfprom", |
| 91 | + .of_match_table = sec_qfprom_of_match, |
| 92 | + }, |
| 93 | +}; |
| 94 | +module_platform_driver(qfprom_driver); |
| 95 | +MODULE_DESCRIPTION("Qualcomm Secure QFPROM driver"); |
| 96 | +MODULE_LICENSE("GPL"); |
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