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1 parent c4334d5 commit c4b5abbCopy full SHA for c4b5abb
arch/arm64/include/asm/ptrace.h
@@ -27,7 +27,7 @@
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*
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* Some code sections either automatically switch back to PSR.I or explicitly
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* require to not use priority masking. If bit GIC_PRIO_PSR_I_SET is included
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- * in the the priority mask, it indicates that PSR.I should be set and
+ * in the priority mask, it indicates that PSR.I should be set and
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* interrupt disabling temporarily does not rely on IRQ priorities.
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*/
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#define GIC_PRIO_IRQON 0xe0
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