Skip to content

Commit c61fea6

Browse files
inochisaConchuOD
authored andcommitted
riscv: dts: thead: th1520: Add PMU event node
T-HEAD th1520 uses standard C910 chip and its pmu is already supported by OpenSBI. Add the pmu event description for T-HEAD th1520 SoC. Signed-off-by: Inochi Amaoto <[email protected]> Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m Reviewed-by: Guo Ren <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
1 parent 2606bf5 commit c61fea6

File tree

1 file changed

+81
-0
lines changed

1 file changed

+81
-0
lines changed

arch/riscv/boot/dts/thead/th1520.dtsi

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -122,6 +122,87 @@
122122
};
123123
};
124124

125+
pmu {
126+
compatible = "riscv,pmu";
127+
riscv,event-to-mhpmcounters =
128+
<0x00003 0x00003 0x0007fff8>,
129+
<0x00004 0x00004 0x0007fff8>,
130+
<0x00005 0x00005 0x0007fff8>,
131+
<0x00006 0x00006 0x0007fff8>,
132+
<0x00007 0x00007 0x0007fff8>,
133+
<0x00008 0x00008 0x0007fff8>,
134+
<0x00009 0x00009 0x0007fff8>,
135+
<0x0000a 0x0000a 0x0007fff8>,
136+
<0x10000 0x10000 0x0007fff8>,
137+
<0x10001 0x10001 0x0007fff8>,
138+
<0x10002 0x10002 0x0007fff8>,
139+
<0x10003 0x10003 0x0007fff8>,
140+
<0x10010 0x10010 0x0007fff8>,
141+
<0x10011 0x10011 0x0007fff8>,
142+
<0x10012 0x10012 0x0007fff8>,
143+
<0x10013 0x10013 0x0007fff8>;
144+
riscv,event-to-mhpmevent =
145+
<0x00003 0x00000000 0x00000001>,
146+
<0x00004 0x00000000 0x00000002>,
147+
<0x00006 0x00000000 0x00000006>,
148+
<0x00005 0x00000000 0x00000007>,
149+
<0x00007 0x00000000 0x00000008>,
150+
<0x00008 0x00000000 0x00000009>,
151+
<0x00009 0x00000000 0x0000000a>,
152+
<0x0000a 0x00000000 0x0000000b>,
153+
<0x10000 0x00000000 0x0000000c>,
154+
<0x10001 0x00000000 0x0000000d>,
155+
<0x10002 0x00000000 0x0000000e>,
156+
<0x10003 0x00000000 0x0000000f>,
157+
<0x10010 0x00000000 0x00000010>,
158+
<0x10011 0x00000000 0x00000011>,
159+
<0x10012 0x00000000 0x00000012>,
160+
<0x10013 0x00000000 0x00000013>;
161+
riscv,raw-event-to-mhpmcounters =
162+
<0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
163+
<0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
164+
<0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
165+
<0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
166+
<0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
167+
<0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
168+
<0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
169+
<0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
170+
<0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
171+
<0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
172+
<0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
173+
<0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
174+
<0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
175+
<0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
176+
<0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
177+
<0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
178+
<0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
179+
<0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
180+
<0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
181+
<0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
182+
<0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
183+
<0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
184+
<0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
185+
<0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
186+
<0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
187+
<0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
188+
<0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
189+
<0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
190+
<0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
191+
<0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
192+
<0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
193+
<0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
194+
<0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
195+
<0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
196+
<0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
197+
<0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
198+
<0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
199+
<0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
200+
<0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
201+
<0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
202+
<0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
203+
<0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
204+
};
205+
125206
osc: oscillator {
126207
compatible = "fixed-clock";
127208
clock-output-names = "osc_24m";

0 commit comments

Comments
 (0)